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Searched refs:dc_mode_limit (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn401/
H A Ddcn401_soc_and_ip_translator.c48 if (use_clock_dc_limits && dc_bw_params->dc_mode_limit.dcfclk_mhz && in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
49 dc_clk_table->entries[i].dcfclk_mhz > dc_bw_params->dc_mode_limit.dcfclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
50 if (i == 0 || dc_clk_table->entries[i-1].dcfclk_mhz < dc_bw_params->dc_mode_limit.dcfclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
51 dml_clk_table->dcfclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.dcfclk_mhz * 1000; in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
71 if (use_clock_dc_limits && dc_bw_params->dc_mode_limit.fclk_mhz && in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
72 dc_clk_table->entries[i].fclk_mhz > dc_bw_params->dc_mode_limit.fclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
73 if (i == 0 || dc_clk_table->entries[i-1].fclk_mhz < dc_bw_params->dc_mode_limit.fclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
74 dml_clk_table->fclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.fclk_mhz * 1000; in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
94 if (use_clock_dc_limits && dc_bw_params->dc_mode_limit.memclk_mhz && in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
95 dc_clk_table->entries[i].memclk_mhz > dc_bw_params->dc_mode_limit.memclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c247 …clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = dcn401_smu_get_dc_mode_max_dpm_freq(clk_mgr, P… in dcn401_init_clocks()
248 if (num_entries_per_clk->num_dcfclk_levels && clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz == in dcn401_init_clocks()
250 clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = 0; in dcn401_init_clocks()
256 …clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz = dcn401_smu_get_dc_mode_max_dpm_freq(clk_mgr, P… in dcn401_init_clocks()
257 if (num_entries_per_clk->num_socclk_levels && clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz == in dcn401_init_clocks()
259 clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz = 0; in dcn401_init_clocks()
266 …clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = dcn401_smu_get_dc_mode_max_dpm_freq(clk_mgr, P… in dcn401_init_clocks()
267 if (num_entries_per_clk->num_dtbclk_levels && clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz == in dcn401_init_clocks()
269 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = 0; in dcn401_init_clocks()
276 …clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz = dcn401_smu_get_dc_mode_max_dpm_freq(clk_mgr, … in dcn401_init_clocks()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c194 …clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_init_clocks()
200 …clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_init_clocks()
207 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = in dcn32_init_clocks()
216 …clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, P… in dcn32_init_clocks()
218 if (clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz > 1950) in dcn32_init_clocks()
219 clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz = 1950; in dcn32_init_clocks()
226 …clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_init_clocks()
228 if (clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz > 1950) in dcn32_init_clocks()
229 clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz = 1950; in dcn32_init_clocks()
1039 …clk_mgr_base->bw_params->dc_mode_limit.memclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_get_memclk_states_from_smu()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c382 if (bw_params->clk_table.entries[i].memclk_mhz <= bw_params->dc_mode_limit.memclk_mhz) in build_synthetic_soc_states()
387 if (bw_params->clk_table.entries[i].fclk_mhz <= bw_params->dc_mode_limit.fclk_mhz) in build_synthetic_soc_states()
392 if (bw_params->clk_table.entries[i].dcfclk_mhz <= bw_params->dc_mode_limit.dcfclk_mhz) in build_synthetic_soc_states()
399 override_max_clk_values(&bw_params->dc_mode_limit, &max_clk_data); in build_synthetic_soc_states()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h269 struct clk_limit_table_entry dc_mode_limit; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c2840 if (bw_params->clk_table.entries[i].memclk_mhz <= bw_params->dc_mode_limit.memclk_mhz) in build_synthetic_soc_states()
2845 if (bw_params->clk_table.entries[i].fclk_mhz <= bw_params->dc_mode_limit.fclk_mhz) in build_synthetic_soc_states()
2850 if (bw_params->clk_table.entries[i].dcfclk_mhz <= bw_params->dc_mode_limit.dcfclk_mhz) in build_synthetic_soc_states()
2857 override_max_clk_values(&bw_params->dc_mode_limit, &max_clk_data); in build_synthetic_soc_states()