Home
last modified time | relevance | path

Searched refs:dc_dsc_cfg (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ !
H A Ddcn20_dsc.c181 DC_LOG_DSC("\tnum_slices_h %d", config->dc_dsc_cfg.num_slices_h); in dsc_config_log()
182 DC_LOG_DSC("\tnum_slices_v %d", config->dc_dsc_cfg.num_slices_v); in dsc_config_log()
184 config->dc_dsc_cfg.bits_per_pixel, in dsc_config_log()
185 config->dc_dsc_cfg.bits_per_pixel / 16, in dsc_config_log()
186 ((config->dc_dsc_cfg.bits_per_pixel % 16) * 10000) / 16); in dsc_config_log()
377 ASSERT(dsc_cfg->dc_dsc_cfg.num_slices_h); in dsc_prepare_config()
378 ASSERT(dsc_cfg->dc_dsc_cfg.num_slices_v); in dsc_prepare_config()
379 ASSERT(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2); in dsc_prepare_config()
382 ASSERT((dsc_cfg->dc_dsc_cfg.version_minor == 1 && in dsc_prepare_config()
383 (8 <= dsc_cfg->dc_dsc_cfg.linebuf_depth && dsc_cfg->dc_dsc_cfg.linebuf_depth <= 13)) || in dsc_prepare_config()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dsc/ !
H A Ddsc.h43 struct dc_dsc_config dc_dsc_cfg; member
/linux/drivers/gpu/drm/amd/display/dc/link/ !
H A Dlink_dpms.c842 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in link_set_dsc_on_stream()
843 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
844 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
848 dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()
855 dccg->funcs->set_dto_dscclk(dccg, odm_dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()
859 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
975 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in link_set_dsc_pps_packet()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ !
H A Ddcn32_hwseq.c1070 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dcn32_update_dsc_on_stream()
1071 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in dcn32_update_dsc_on_stream()
1072 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn32_update_dsc_on_stream()
1076 dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in dcn32_update_dsc_on_stream()
1086 dccg->funcs->set_dto_dscclk(dccg, odm_dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in dcn32_update_dsc_on_stream()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ !
H A Ddcn35_hwseq.c364 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in update_dsc_on_stream()
365 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
366 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
378 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ !
H A Ddcn20_resource.c1704 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dcn20_validate_dsc()
1705 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
/linux/drivers/gpu/drm/amd/display/dc/core/ !
H A Ddc_hw_sequencer.c2343 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in hwss_dsc_calculate_and_set_config()
2344 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in hwss_dsc_calculate_and_set_config()