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Searched refs:dc_dmub_srv (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.h48 struct dc_dmub_srv { struct
62 bool dc_dmub_srv_wait_for_pending(struct dc_dmub_srv *dc_dmub_srv); argument
64 bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv);
66 bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,
70 bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,
74 bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd, enum dm_dmub_wait…
76 bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cm…
78 bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv,
81 bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv);
92 void dc_dmub_srv_query_caps_cmd(struct dc_dmub_srv *dc_dmub_srv);
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H A Ddc_dmub_srv.c40 #define CTX dc_dmub_srv->ctx
46 static void dc_dmub_srv_construct(struct dc_dmub_srv *dc_srv, struct dc *dc, in dc_dmub_srv_construct()
53 static void dc_dmub_srv_handle_failure(struct dc_dmub_srv *dc_dmub_srv) in dc_dmub_srv_handle_failure() argument
55 dc_dmub_srv_log_diagnostic_data(dc_dmub_srv); in dc_dmub_srv_handle_failure()
56 if (dc_dmub_srv->ctx->dc->debug.enable_dmu_recovery) in dc_dmub_srv_handle_failure()
57 dm_helpers_dmu_timeout(dc_dmub_srv->ctx); in dc_dmub_srv_handle_failure()
60 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create()
62 struct dc_dmub_srv *dc_srv = in dc_dmub_srv_create()
63 kzalloc_obj(struct dc_dmub_srv); in dc_dmub_srv_create()
75 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv) in dc_dmub_srv_destroy()
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H A Ddm_services.h42 struct dc_dmub_srv;
127 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub);
128 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv);
H A DMakefile65 FILES += dc_dmub_srv.o
H A Ddc_types.h51 struct dc_dmub_srv;
825 struct dc_dmub_srv *dmub_srv;
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_panel_cntl.c44 struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv; in dcn31_query_backlight_info() local
46 if (!dc_dmub_srv) in dcn31_query_backlight_info()
55 return dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY); in dcn31_query_backlight_info()
71 struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv; in dcn31_panel_cntl_hw_init() local
75 if (!dc_dmub_srv) in dcn31_panel_cntl_hw_init()
89 if (!dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)) in dcn31_panel_cntl_hw_init()
110 if (!dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)) in dcn31_panel_cntl_hw_init()
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_outbox.h29 struct dc_dmub_srv;
31 void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv);
H A Ddmub_hw_lock_mgr.h32 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,
37 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
H A Ddmub_outbox.c39 void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv) in dmub_enable_outbox_notification()
/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table2.c110 struct dc_dmub_srv *dmcub, in encoder_control_dmcub()
247 struct dc_dmub_srv *dmcub, in transmitter_control_dmcub()
309 struct dc_dmub_srv *dmcub, in transmitter_control_dmcub_v1_7()
462 struct dc_dmub_srv *dmcub, in set_pixel_clock_dmcub()
825 struct dc_dmub_srv *dmcub, in enable_disp_power_gating_dmcub()
1029 struct dc_dmub_srv *dmcub, in enable_lvtma_control_dmcub()
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_dpia.c117 struct dc_dmub_srv *dmub_srv = link->ctx->dmub_srv; in dpia_query_hpd_status()
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h145 struct dc_dmub_srv *dc_dmub_srv; member
1647 struct dc_dmub_srv *dc_dmub_srv, struct dc_plane_address *addr, uint8_t subvp_index);
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c813 block_sequence[*num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv; in hwss_build_fast_sequence()
1555 struct dc_dmub_srv *dc_dmub_srv, in hwss_add_dmub_subvp_save_surf_addr() argument
1560 seq_state->steps[*seq_state->num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc_dmub_srv; in hwss_add_dmub_subvp_save_surf_addr()
2017 struct dc_dmub_srv *dc_dmub_srv = params->subvp_save_surf_addr.dc_dmub_srv; in hwss_subvp_save_surf_addr() local
2021 dc_dmub_srv_subvp_save_surf_addr(dc_dmub_srv, addr, subvp_index); in hwss_subvp_save_surf_addr()
H A Ddc.c559 dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv, in dc_stream_forward_dmub_crc_window()
597 struct dc_dmub_srv *dmub_srv; in dc_stream_forward_crc_window()
632 dc_stream_forward_dmub_multiple_crc_window(struct dc_dmub_srv *dmub_srv, in dc_stream_forward_dmub_multiple_crc_window()
663 struct dc_dmub_srv *dmub_srv; in dc_stream_forward_multiple_crc_window()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c2682 struct dc_dmub_srv *dc_dmub_srv; in ips_status_show() local
2692 dc_dmub_srv = dc->ctx->dmub_srv; in ips_status_show()
2693 if (dc_dmub_srv && dc_dmub_srv->dmub) { in ips_status_show()
2696 &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw; in ips_status_show()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c1850 params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv; in dcn20_update_dchubp_dpp()