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Searched refs:dc_bw_params (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn401/
H A Ddcn401_soc_and_ip_translator.c31 const struct clk_bw_params *dc_bw_params, in dcn401_convert_dc_clock_table_to_soc_bb_clock_table() argument
37 if (dc_bw_params == NULL) in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
41 dc_clk_table = &dc_bw_params->clk_table; in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
48 if (use_clock_dc_limits && dc_bw_params->dc_mode_limit.dcfclk_mhz && in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
49 dc_clk_table->entries[i].dcfclk_mhz > dc_bw_params->dc_mode_limit.dcfclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
50 if (i == 0 || dc_clk_table->entries[i-1].dcfclk_mhz < dc_bw_params->dc_mode_limit.dcfclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
51 dml_clk_table->dcfclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.dcfclk_mhz * 1000; in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
71 if (use_clock_dc_limits && dc_bw_params->dc_mode_limit.fclk_mhz && in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
72 dc_clk_table->entries[i].fclk_mhz > dc_bw_params->dc_mode_limit.fclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
73 if (i == 0 || dc_clk_table->entries[i-1].fclk_mhz < dc_bw_params->dc_mode_limit.fclk_mhz) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
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