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Searched refs:dbi_base (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/pci/controller/dwc/
H A Dpci-layerscape.c80 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
91 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
100 val = ioread32(pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
102 iowrite32(val, pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
110 iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); in ls_pcie_fix_error_response()
330 struct resource *dbi_base; in ls_pcie_probe() local
347 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); in ls_pcie_probe()
348 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_probe()
349 if (IS_ERR(pci->dbi_base)) in ls_pcie_probe()
350 return PTR_ERR(pci->dbi_base); in ls_pcie_probe()
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H A Dpci-layerscape-ep.c57 return ioread32be(pci->dbi_base + offset); in ls_pcie_pf_lut_readl()
59 return ioread32(pci->dbi_base + offset); in ls_pcie_pf_lut_readl()
67 iowrite32be(value, pci->dbi_base + offset); in ls_pcie_pf_lut_writel()
69 iowrite32(value, pci->dbi_base + offset); in ls_pcie_pf_lut_writel()
232 struct resource *dbi_base; in ls_pcie_ep_probe() local
262 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); in ls_pcie_ep_probe()
263 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_ep_probe()
264 if (IS_ERR(pci->dbi_base)) in ls_pcie_ep_probe()
265 return PTR_ERR(pci->dbi_base); in ls_pcie_ep_probe()
H A Dpcie-al.c19 void __iomem *dbi_base; member
27 void __iomem *dbi_base = pcie->dbi_base; in al_pcie_map_bus() local
37 return dbi_base + where; in al_pcie_map_bus()
69 al_pcie->dbi_base = devm_pci_remap_cfg_resource(dev, res); in al_pcie_init()
70 if (IS_ERR(al_pcie->dbi_base)) in al_pcie_init()
71 return PTR_ERR(al_pcie->dbi_base); in al_pcie_init()
H A Dpcie-tegra194-acpi.c19 void __iomem *dbi_base; member
33 pcie_ecam->dbi_base = cfg->win + SZ_512K; in tegra194_acpi_init()
79 return pcie_ecam->dbi_base + where; in tegra194_map_bus()
H A Dpcie-qcom.c346 val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_clear_aspm_l0s()
348 writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_clear_aspm_l0s()
360 val = readl(pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_clear_hpc()
362 writel(val, pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_clear_hpc()
557 pci->dbi_base + AXI_MSTR_RESP_COMP_CTRL0); in qcom_pcie_post_init_2_1_0()
559 pci->dbi_base + AXI_MSTR_RESP_COMP_CTRL1); in qcom_pcie_post_init_2_1_0()
913 writel(PCI_COMMAND_MASTER, pci->dbi_base + PCI_COMMAND); in qcom_pcie_post_init_2_3_3()
917 writel(PCIE_CAP_SLOT_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP); in qcom_pcie_post_init_2_3_3()
919 val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_post_init_2_3_3()
921 writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP); in qcom_pcie_post_init_2_3_3()
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H A Dpcie-designware.c120 if (!pci->dbi_base) { in dw_pcie_get_resources()
122 pci->dbi_base = devm_pci_remap_cfg_resource(pci->dev, res); in dw_pcie_get_resources()
123 if (IS_ERR(pci->dbi_base)) in dw_pcie_get_resources()
124 return PTR_ERR(pci->dbi_base); in dw_pcie_get_resources()
136 pci->dbi_base2 = pci->dbi_base + SZ_4K; in dw_pcie_get_resources()
150 pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; in dw_pcie_get_resources()
390 return pci->ops->read_dbi(pci, pci->dbi_base, reg, size); in dw_pcie_read_dbi()
392 ret = dw_pcie_read(pci->dbi_base + reg, size, &val); in dw_pcie_read_dbi()
405 pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val); in dw_pcie_write_dbi()
409 ret = dw_pcie_write(pci->dbi_base + reg, size, val); in dw_pcie_write_dbi()
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H A Dpcie-armada8k.c308 pci->dbi_base = devm_pci_remap_cfg_resource(dev, base); in armada8k_pcie_probe()
309 if (IS_ERR(pci->dbi_base)) { in armada8k_pcie_probe()
310 ret = PTR_ERR(pci->dbi_base); in armada8k_pcie_probe()
H A Dpci-dra7xx.c455 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "ep_dbics"); in dra7xx_add_pcie_ep()
456 if (IS_ERR(pci->dbi_base)) in dra7xx_add_pcie_ep()
457 return PTR_ERR(pci->dbi_base); in dra7xx_add_pcie_ep()
501 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "rc_dbics"); in dra7xx_add_pcie_port()
502 if (IS_ERR(pci->dbi_base)) in dra7xx_add_pcie_port()
503 return PTR_ERR(pci->dbi_base); in dra7xx_add_pcie_port()
H A Dpcie-histb.c320 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "rc-dbi"); in histb_pcie_probe()
321 if (IS_ERR(pci->dbi_base)) { in histb_pcie_probe()
323 return PTR_ERR(pci->dbi_base); in histb_pcie_probe()
H A Dpcie-qcom-ep.c318 status = readw(pci->dbi_base + offset + PCI_EXP_LNKSTA); in qcom_pcie_ep_icc_update()
599 pci->dbi_base = devm_pci_remap_cfg_resource(dev, res); in qcom_pcie_ep_get_io_resources()
600 if (IS_ERR(pci->dbi_base)) in qcom_pcie_ep_get_io_resources()
601 return PTR_ERR(pci->dbi_base); in qcom_pcie_ep_get_io_resources()
602 pci->dbi_base2 = pci->dbi_base; in qcom_pcie_ep_get_io_resources()
H A Dpcie-intel-gw.c107 pcie_update_bits(pcie->pci.dbi_base, ofs, mask, val); in pcie_rc_cfg_wr_mask()
301 pci->atu_base = pci->dbi_base + 0xC0000; in intel_pcie_host_setup()
H A Dpcie-spear13xx.c128 spear13xx_pcie->app_base = pci->dbi_base + 0x2000; in spear13xx_pcie_host_init()
H A Dpci-meson.c123 pci->dbi_base = pci->elbi_base; in meson_pcie_get_mems()
H A Dpci-keystone.c837 pci->dbi_base + PCI_IO_BASE); in ks_pcie_host_init()
1165 pci->dbi_base = base; in ks_pcie_probe()
H A Dpcie-designware-host.c830 return pci->dbi_base + where; in dw_pcie_own_conf_map_bus()
847 return pci->dbi_base + where; in dw_pcie_ecam_conf_map_bus()
H A Dpcie-dw-rockchip.c317 pci->dbi_base2 = pci->dbi_base + PCIE_TYPE0_HDR_DBI2_OFFSET; in rockchip_pcie_host_init()
H A Dpcie-designware.h522 void __iomem *dbi_base; member