| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | cyan_skillfish_ppt.c | 298 uint32_t cur_value = 0; in cyan_skillfish_emit_clk_levels() local 303 ret = cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, &cur_value); in cyan_skillfish_emit_clk_levels() 307 size += sysfs_emit_at(buf, size, "0: %uMhz *\n", cur_value); in cyan_skillfish_emit_clk_levels() 310 ret = cyan_skillfish_get_smu_metrics_data(smu, METRICS_VOLTAGE_VDDGFX, &cur_value); in cyan_skillfish_emit_clk_levels() 314 size += sysfs_emit_at(buf, size, "0: %umV *\n", cur_value); in cyan_skillfish_emit_clk_levels() 328 ret = cyan_skillfish_get_current_clk_freq(smu, clk_type, &cur_value); in cyan_skillfish_emit_clk_levels() 331 size += sysfs_emit_at(buf, size, "0: %uMhz *\n", cur_value); in cyan_skillfish_emit_clk_levels() 335 ret = cyan_skillfish_get_current_clk_freq(smu, clk_type, &cur_value); in cyan_skillfish_emit_clk_levels() 338 if (cur_value == CYAN_SKILLFISH_SCLK_MAX) in cyan_skillfish_emit_clk_levels() 340 else if (cur_value == CYAN_SKILLFISH_SCLK_MIN) in cyan_skillfish_emit_clk_levels() [all …]
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| H A D | vangogh_ppt.c | 574 uint32_t cur_value = 0, value = 0, count = 0; in vangogh_emit_legacy_clk_levels() local 614 cur_value = metrics.SocclkFrequency; in vangogh_emit_legacy_clk_levels() 618 cur_value = metrics.VclkFrequency; in vangogh_emit_legacy_clk_levels() 622 cur_value = metrics.DclkFrequency; in vangogh_emit_legacy_clk_levels() 626 cur_value = metrics.MemclkFrequency; in vangogh_emit_legacy_clk_levels() 630 ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetFclkFrequency, 0, &cur_value); in vangogh_emit_legacy_clk_levels() 652 cur_value == value ? "*" : ""); in vangogh_emit_legacy_clk_levels() 653 if (cur_value == value) in vangogh_emit_legacy_clk_levels() 658 size += sysfs_emit_at(buf, size, " %uMhz *\n", cur_value); in vangogh_emit_legacy_clk_levels() 676 uint32_t cur_value = 0, value = 0, count = 0; in vangogh_emit_clk_levels() local [all …]
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| H A D | arcturus_ppt.c | 771 uint32_t cur_value = 0; in arcturus_emit_clk_levels() local 782 ret = arcturus_get_current_clk_freq_by_table(smu, SMU_GFXCLK, &cur_value); in arcturus_emit_clk_levels() 789 cur_value, buf, offset); in arcturus_emit_clk_levels() 795 ret = arcturus_get_current_clk_freq_by_table(smu, SMU_UCLK, &cur_value); in arcturus_emit_clk_levels() 802 cur_value, buf, offset); in arcturus_emit_clk_levels() 808 ret = arcturus_get_current_clk_freq_by_table(smu, SMU_SOCCLK, &cur_value); in arcturus_emit_clk_levels() 815 cur_value, buf, offset); in arcturus_emit_clk_levels() 821 ret = arcturus_get_current_clk_freq_by_table(smu, SMU_FCLK, &cur_value); in arcturus_emit_clk_levels() 828 cur_value, buf, offset); in arcturus_emit_clk_levels() 834 ret = arcturus_get_current_clk_freq_by_table(smu, SMU_VCLK, &cur_value); in arcturus_emit_clk_levels() [all …]
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| H A D | navi10_ppt.c | 1250 uint32_t cur_value = 0; in navi10_emit_clk_levels() local 1397 &cur_value); in navi10_emit_clk_levels() 1401 cur_value, buf, offset); in navi10_emit_clk_levels()
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| H A D | sienna_cichlid_ppt.c | 1282 uint32_t cur_value = 0; in sienna_cichlid_emit_clk_levels() local 1390 smu, clk_type, &cur_value); in sienna_cichlid_emit_clk_levels() 1394 cur_value, buf, offset); in sienna_cichlid_emit_clk_levels()
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| /linux/sound/xen/ |
| H A D | xen_snd_front_cfg.c | 155 unsigned int cur_value; in cfg_hw_rates() local 170 cur_value = CFG_HW_SUPPORTED_RATES[i].value; in cfg_hw_rates() 172 if (rate_min > cur_value) in cfg_hw_rates() 173 rate_min = cur_value; in cfg_hw_rates() 174 if (rate_max < cur_value) in cfg_hw_rates() 175 rate_max = cur_value; in cfg_hw_rates()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 491 uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0; in renoir_emit_clk_levels() local 526 cur_value = metrics.ClockFrequency[CLOCK_GFXCLK]; in renoir_emit_clk_levels() 531 if (cur_value == max) in renoir_emit_clk_levels() 533 else if (cur_value == min) in renoir_emit_clk_levels() 540 i == 1 ? cur_value : in renoir_emit_clk_levels() 548 cur_value = metrics.ClockFrequency[CLOCK_SOCCLK]; in renoir_emit_clk_levels() 552 cur_value = metrics.ClockFrequency[CLOCK_FCLK]; in renoir_emit_clk_levels() 556 cur_value = metrics.ClockFrequency[CLOCK_DCFCLK]; in renoir_emit_clk_levels() 560 cur_value = metrics.ClockFrequency[CLOCK_FCLK]; in renoir_emit_clk_levels() 564 cur_value = metrics.ClockFrequency[CLOCK_VCLK]; in renoir_emit_clk_levels() [all …]
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu_helper.c | 114 uint32_t cur_value; in phm_wait_on_register() local 122 cur_value = cgs_read_register(hwmgr->device, index); in phm_wait_on_register() 123 if ((cur_value & mask) == (value & mask)) in phm_wait_on_register() 160 uint32_t cur_value; in phm_wait_for_register_unequal() local 166 cur_value = cgs_read_register(hwmgr->device, in phm_wait_for_register_unequal() 168 if ((cur_value & mask) != (value & mask)) in phm_wait_for_register_unequal()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_5_ppt.c | 872 uint32_t cur_value = 0, value = 0, count = 0; in smu_v13_0_5_emit_clk_levels() local 892 ret = smu_v13_0_5_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v13_0_5_emit_clk_levels() 907 cur_value == value ? "*" : ""); in smu_v13_0_5_emit_clk_levels() 912 ret = smu_v13_0_5_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v13_0_5_emit_clk_levels() 917 if (cur_value == max) in smu_v13_0_5_emit_clk_levels() 919 else if (cur_value == min) in smu_v13_0_5_emit_clk_levels() 926 i == 1 ? cur_value : SMU_13_0_5_UMD_PSTATE_GFXCLK, in smu_v13_0_5_emit_clk_levels()
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| H A D | smu_v13_0_4_ppt.c | 507 uint32_t cur_value = 0, value = 0, count = 0; in smu_v13_0_4_emit_clk_levels() local 529 ret = smu_v13_0_4_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v13_0_4_emit_clk_levels() 544 cur_value == value ? "*" : ""); in smu_v13_0_4_emit_clk_levels() 549 ret = smu_v13_0_4_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v13_0_4_emit_clk_levels() 554 if (cur_value == max) in smu_v13_0_4_emit_clk_levels() 556 else if (cur_value == min) in smu_v13_0_4_emit_clk_levels() 563 i == 1 ? cur_value : 1100, /* UMD PSTATE GFXCLK 1100 */ in smu_v13_0_4_emit_clk_levels()
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| H A D | yellow_carp_ppt.c | 1052 uint32_t cur_value = 0, value = 0, count = 0; in yellow_carp_emit_clk_levels() local 1074 ret = yellow_carp_get_current_clk_freq(smu, clk_type, &cur_value); in yellow_carp_emit_clk_levels() 1089 cur_value == value ? "*" : ""); in yellow_carp_emit_clk_levels() 1095 ret = yellow_carp_get_current_clk_freq(smu, clk_type, &cur_value); in yellow_carp_emit_clk_levels() 1100 if (cur_value == max) in yellow_carp_emit_clk_levels() 1102 else if (cur_value == min) in yellow_carp_emit_clk_levels() 1109 i == 1 ? cur_value : clk_limit, in yellow_carp_emit_clk_levels()
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| H A D | aldebaran_ppt.c | 797 uint32_t cur_value = 0; in aldebaran_emit_clk_levels() local 845 &cur_value); in aldebaran_emit_clk_levels() 851 cur_value, buf, offset); in aldebaran_emit_clk_levels()
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| /linux/drivers/xen/xen-pciback/ |
| H A D | conf_space_header.c | 285 u8 cur_value; in bist_write() local 288 err = pci_read_config_byte(dev, offset, &cur_value); in bist_write() 292 if ((cur_value & ~PCI_BIST_START) == (value & ~PCI_BIST_START) in bist_write()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu15/ |
| H A D | smu_v15_0_0_ppt.c | 1007 uint32_t cur_value = 0, value = 0, count = 0; in smu_v15_0_0_emit_clk_levels() local 1031 ret = smu_v15_0_0_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v15_0_0_emit_clk_levels() 1047 cur_value == value ? "*" : ""); in smu_v15_0_0_emit_clk_levels() 1052 ret = smu_v15_0_0_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v15_0_0_emit_clk_levels() 1057 if (cur_value == max) in smu_v15_0_0_emit_clk_levels() 1059 else if (cur_value == min) in smu_v15_0_0_emit_clk_levels() 1067 i == 1 ? cur_value : 1100, /* UMD PSTATE GFXCLK 1100 */ in smu_v15_0_0_emit_clk_levels()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0_0_ppt.c | 1143 uint32_t cur_value = 0, value = 0, count = 0; in smu_v14_0_0_emit_clk_levels() local 1167 ret = smu_v14_0_0_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v14_0_0_emit_clk_levels() 1182 cur_value == value ? "*" : ""); in smu_v14_0_0_emit_clk_levels() 1187 ret = smu_v14_0_0_get_current_clk_freq(smu, clk_type, &cur_value); in smu_v14_0_0_emit_clk_levels() 1192 if (cur_value == max) in smu_v14_0_0_emit_clk_levels() 1194 else if (cur_value == min) in smu_v14_0_0_emit_clk_levels() 1201 i == 1 ? cur_value : 1100, /* UMD PSTATE GFXCLK 1100 */ in smu_v14_0_0_emit_clk_levels()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | qat_hal.c | 1235 unsigned int cur_value; in qat_hal_concat_micro_code() local 1242 cur_value = value[0]; in qat_hal_concat_micro_code() 1252 INSERT_IMMED_GPRB_CONST(micro_inst[fixup_offset], (cur_value >> 0)); in qat_hal_concat_micro_code() 1254 INSERT_IMMED_GPRB_CONST(micro_inst[fixup_offset], (cur_value >> 0x10)); in qat_hal_concat_micro_code()
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| /linux/drivers/net/ethernet/qlogic/qed/ |
| H A D | qed_main.c | 2354 u32 offset, mask, value, cur_value; in qed_nvm_flash_image_access() local 2372 cur_value = le32_to_cpu(*((__le32 *)buf)); in qed_nvm_flash_image_access() 2375 nvm_image.start_addr + offset, cur_value, in qed_nvm_flash_image_access() 2376 (cur_value & ~mask) | (value & mask), value, mask); in qed_nvm_flash_image_access() 2377 value = (value & mask) | (cur_value & ~mask); in qed_nvm_flash_image_access()
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| /linux/drivers/input/touchscreen/ |
| H A D | wdt87xx_i2c.c | 608 static u16 misr(u16 cur_value, u8 new_value) in misr() argument 614 a = cur_value; in misr()
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| /linux/drivers/scsi/bfa/ |
| H A D | bfa_defs_svc.h | 930 u16 cur_value; member
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| H A D | bfa_fcpim.c | 3829 throttle.cur_value = (u16)(fcpim->fcp->num_ioim_reqs); in bfa_fcpim_throttle_get() 3832 throttle.cfg_value = throttle.cur_value; in bfa_fcpim_throttle_get()
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