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Searched refs:cur_en (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
H A Ddcn401_dpp_cm.c136 uint32_t cur_en = pos->enable ? 1 : 0; in dpp401_set_cursor_position() local
138 if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) { in dpp401_set_cursor_position()
140 REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); in dpp401_set_cursor_position()
143 dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; in dpp401_set_cursor_position()
144 dpp_base->att.cur0_ctl.bits.cur0_enable = cur_en; in dpp401_set_cursor_position()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp.c452 uint32_t cur_en = pos->enable ? 1 : 0; in dpp1_set_cursor_position() local
477 cur_en = 0; /* not visible beyond right edge*/ in dpp1_set_cursor_position()
480 cur_en = 0; /* not visible beyond left edge*/ in dpp1_set_cursor_position()
483 cur_en = 0; /* not visible beyond bottom edge*/ in dpp1_set_cursor_position()
486 cur_en = 0; /* not visible beyond top edge*/ in dpp1_set_cursor_position()
488 if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) { in dpp1_set_cursor_position()
490 REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); in dpp1_set_cursor_position()
493 dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; in dpp1_set_cursor_position()
494 dpp_base->att.cur0_ctl.bits.cur0_enable = cur_en; in dpp1_set_cursor_position()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c741 uint32_t cur_en = pos->enable ? 1 : 0; in hubp401_cursor_set_position() local
752 ASSERT(!cur_en || pos->x == 0); in hubp401_cursor_set_position()
753 ASSERT(!cur_en || pos->x_hotspot == 0); in hubp401_cursor_set_position()
780 if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) { in hubp401_cursor_set_position()
781 if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) in hubp401_cursor_set_position()
786 CURSOR_ENABLE, cur_en); in hubp401_cursor_set_position()
802 hubp->pos.cur_ctl.bits.cur_enable = cur_en; in hubp401_cursor_set_position()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
H A Ddcn10_hubp.c1213 uint32_t cur_en = pos->enable ? 1 : 0; in hubp1_cursor_set_position() local
1261 cur_en = 0; /* not visible beyond right edge*/ in hubp1_cursor_set_position()
1264 cur_en = 0; /* not visible beyond left edge*/ in hubp1_cursor_set_position()
1267 cur_en = 0; /* not visible beyond bottom edge*/ in hubp1_cursor_set_position()
1270 cur_en = 0; /* not visible beyond top edge*/ in hubp1_cursor_set_position()
1272 if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) in hubp1_cursor_set_position()
1276 CURSOR_ENABLE, cur_en); in hubp1_cursor_set_position()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
H A Ddcn20_hubp.c1004 uint32_t cur_en = pos->enable ? 1 : 0; in hubp2_cursor_set_position() local
1052 cur_en = 0; /* not visible beyond right edge*/ in hubp2_cursor_set_position()
1055 cur_en = 0; /* not visible beyond left edge*/ in hubp2_cursor_set_position()
1058 cur_en = 0; /* not visible beyond bottom edge*/ in hubp2_cursor_set_position()
1061 cur_en = 0; /* not visible beyond top edge*/ in hubp2_cursor_set_position()
1063 if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) { in hubp2_cursor_set_position()
1066 if (cur_en && cursor_not_programmed) in hubp2_cursor_set_position()
1070 REG_UPDATE(CURSOR_CONTROL, CURSOR_ENABLE, cur_en); in hubp2_cursor_set_position()
1088 hubp->pos.cur_ctl.bits.cur_enable = cur_en; in hubp2_cursor_set_position()