Home
last modified time | relevance | path

Searched refs:ctrl_base (Results 1 – 25 of 27) sorted by relevance

12

/linux/arch/arm/mach-hisi/
H A Dhotplug.c72 static void __iomem *ctrl_base; variable
83 ctrl_base + SCPERPWREN); in set_cpu_hi3620()
87 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN); in set_cpu_hi3620()
92 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
95 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620()
100 ctrl_base + SCISODIS); in set_cpu_hi3620()
104 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
106 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
111 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
114 val = readl_relaxed(ctrl_base in set_cpu_hi3620()
[all...]
H A Dplatsmp.c21 static void __iomem *ctrl_base; variable
26 if (!cpu || !ctrl_base) in hi3xxx_set_cpu_jump()
28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
34 if (!cpu || !ctrl_base) in hi3xxx_get_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
62 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
68 ctrl_base = of_iomap(np, 0); in hi3xxx_smp_prepare_cpus()
69 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
79 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
165 ctrl_base in hip01_boot_secondary()
[all...]
/linux/drivers/phy/broadcom/
H A Dphy-brcm-usb-init.c464 static u32 brcmusb_usb_mdio_read(void __iomem *ctrl_base, u32 reg, int mode) in brcmusb_usb_mdio_read() argument
469 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_read()
471 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_read()
475 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_read()
479 return brcm_usb_readl(USB_CTRL_REG(ctrl_base, MDIO2)) & 0xffff; in brcmusb_usb_mdio_read()
482 static void brcmusb_usb_mdio_write(void __iomem *ctrl_base, u32 reg, in brcmusb_usb_mdio_write() argument
488 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_write()
490 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_write()
495 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_write()
500 static void brcmusb_usb_phy_ldo_fix(void __iomem *ctrl_base) in brcmusb_usb_phy_ldo_fix() argument
516 brcmusb_usb2_eye_fix(void __iomem * ctrl_base) brcmusb_usb2_eye_fix() argument
523 brcmusb_usb3_pll_fix(void __iomem * ctrl_base) brcmusb_usb3_pll_fix() argument
530 brcmusb_usb3_enable_pipe_reset(void __iomem * ctrl_base) brcmusb_usb3_enable_pipe_reset() argument
540 brcmusb_usb3_enable_sigdet(void __iomem * ctrl_base) brcmusb_usb3_enable_sigdet() argument
557 brcmusb_usb3_enable_skip_align(void __iomem * ctrl_base) brcmusb_usb3_enable_skip_align() argument
573 brcmusb_usb3_unfreeze_aeq(void __iomem * ctrl_base) brcmusb_usb3_unfreeze_aeq() argument
594 void __iomem *ctrl_base = params->regs[BRCM_REGS_CTRL]; brcmusb_usb3_pll_54mhz() local
656 brcmusb_usb3_ssc_enable(void __iomem * ctrl_base) brcmusb_usb3_ssc_enable() argument
676 void __iomem *ctrl_base = params->regs[BRCM_REGS_CTRL]; brcmusb_usb3_phy_workarounds() local
[all...]
/linux/arch/arm/mach-omap2/
H A Domap_phy_internal.c35 void __iomem *ctrl_base; in omap4430_phy_power_down() local
40 ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); in omap4430_phy_power_down()
41 if (!ctrl_base) { in omap4430_phy_power_down()
47 writel_relaxed(PHY_PD, ctrl_base + CONTROL_DEV_CONF); in omap4430_phy_power_down()
49 iounmap(ctrl_base); in omap4430_phy_power_down()
/linux/drivers/fsi/
H A Dfsi-master-aspeed.c34 static const u32 ctrl_base = 0x80000000; variable
228 opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0); in check_errors()
229 opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0); in check_errors()
230 opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0); in check_errors()
242 ret = opb_writel(aspeed, ctrl_base + FSI_MRESP0, in check_errors()
340 ret = opb_writel(aspeed, ctrl_base + FSI_MCENP0 + (4 * idx), reg); in aspeed_master_link_enable()
344 ret = opb_writel(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx), reg); in aspeed_master_link_enable()
401 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); in aspeed_master_init()
406 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); in aspeed_master_init()
409 opb_writel(aspeed, ctrl_base in aspeed_master_init()
[all...]
/linux/drivers/video/fbdev/riva/
H A Dnv_driver.c319 (volatile U032 __iomem *)(par->ctrl_base + 0x00680000); in riva_common_setup()
321 (volatile U032 __iomem *)(par->ctrl_base + 0x00100000); in riva_common_setup()
323 (volatile U032 __iomem *)(par->ctrl_base + 0x00002000); in riva_common_setup()
325 (volatile U032 __iomem *)(par->ctrl_base + 0x00400000); in riva_common_setup()
327 (volatile U032 __iomem *)(par->ctrl_base + 0x00101000); in riva_common_setup()
329 (volatile U032 __iomem *)(par->ctrl_base + 0x00009000); in riva_common_setup()
331 (volatile U032 __iomem *)(par->ctrl_base + 0x00000000); in riva_common_setup()
333 (volatile U032 __iomem *)(par->ctrl_base + 0x00800000); in riva_common_setup()
334 par->riva.PCIO0 = par->ctrl_base + 0x00601000; in riva_common_setup()
335 par->riva.PDIO0 = par->ctrl_base in riva_common_setup()
[all...]
H A Drivafb.h48 u8 __iomem *ctrl_base; /* virtual control register base addr */ member
H A Dfbdev.c1966 default_par->ctrl_base = ioremap(rivafb_fix.mmio_start, in rivafb_probe()
1968 if (!default_par->ctrl_base) { in rivafb_probe()
1992 (u32 __iomem *)(default_par->ctrl_base + 0x00600000); in rivafb_probe()
1994 (u32 __iomem *)(default_par->ctrl_base + 0x00710000); in rivafb_probe()
2064 iounmap(default_par->ctrl_base); in rivafb_probe()
2092 iounmap(par->ctrl_base); in rivafb_remove()
/linux/arch/mips/pci/
H A Dpci-ar724x.c41 void __iomem *ctrl_base; member
60 reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET); in ar724x_pci_check_link()
236 base = apc->ctrl_base; in ar724x_pci_irq_handler()
256 base = apc->ctrl_base; in ar724x_pci_irq_unmask()
277 base = apc->ctrl_base; in ar724x_pci_irq_mask()
311 base = apc->ctrl_base; in ar724x_pci_irq_init()
349 app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); in ar724x_pci_hw_init()
351 __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP); in ar724x_pci_hw_init()
375 apc->ctrl_base = devm_platform_ioremap_resource_byname(pdev, "ctrl_base"); in ar724x_pci_probe()
[all...]
/linux/drivers/media/platform/verisilicon/
H A Dimx8m_vpu_hw.c33 val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
35 writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
40 val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
42 writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
49 val = readl(vpu->ctrl_base + CTRL_CLOCK_ENABLE); in imx8m_clk_enable()
51 writel(val, vpu->ctrl_base + CTRL_CLOCK_ENABLE); in imx8m_clk_enable()
68 writel(0xffffffff, vpu->ctrl_base + CTRL_G1_DEC_FUSE); in imx8mq_runtime_resume()
69 writel(0xffffffff, vpu->ctrl_base + CTRL_G1_PP_FUSE); in imx8mq_runtime_resume()
70 writel(0xffffffff, vpu->ctrl_base + CTRL_G2_DEC_FUSE); in imx8mq_runtime_resume()
257 vpu->ctrl_base in imx8mq_vpu_hw_init()
[all...]
/linux/arch/arm/mm/
H A Dcache-uniphier.c63 * @ctrl_base: virtual base address of control registers
75 void __iomem *ctrl_base; member
226 writel_relaxed(val, data->ctrl_base + UNIPHIER_SSCC); in __uniphier_cache_enable()
376 data->ctrl_base = of_iomap(np, 0); in __uniphier_cache_init()
377 if (!data->ctrl_base) { in __uniphier_cache_init()
397 data->way_ctrl_base = data->ctrl_base + 0xc00; in __uniphier_cache_init()
414 data->way_ctrl_base = data->ctrl_base + 0x870; in __uniphier_cache_init()
418 data->way_ctrl_base = data->ctrl_base + 0x840; in __uniphier_cache_init()
447 iounmap(data->ctrl_base); in __uniphier_cache_init()
/linux/drivers/leds/
H A Dleds-sc27xx-bltc.c90 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_enable() local
102 return regmap_update_bits(regmap, ctrl_base, in sc27xx_led_enable()
110 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_disable() local
113 return regmap_update_bits(regmap, ctrl_base, in sc27xx_led_disable()
151 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_pattern_clear() local
161 err = regmap_update_bits(regmap, ctrl_base, in sc27xx_led_pattern_clear()
177 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_pattern_set() local
229 err = regmap_update_bits(regmap, ctrl_base, in sc27xx_led_pattern_set()
/linux/drivers/usb/musb/
H A Dmusb_dsps.c173 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_enable()
199 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_disable()
269 musb_writel(musb->ctrl_base, wrp->coreintr_set, in dsps_check_status()
311 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr); in dsps_musb_clear_ep_rxintr()
317 void __iomem *reg_base = musb->ctrl_base; in dsps_interrupt()
419 glue->regset.base = musb->ctrl_base; in dsps_musb_dbg_init()
440 musb->ctrl_base = reg_base; in dsps_musb_init()
477 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); in dsps_musb_init()
515 void __iomem *ctrl_base = musb->ctrl_base; in dsps_musb_set_mode() local
[all...]
H A Dtusb6010.c51 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
68 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision()
101 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk()
333 void __iomem *tbase = musb->ctrl_base; in tusb_draw_power()
369 void __iomem *tbase = musb->ctrl_base; in tusb_set_clock_source()
396 void __iomem *tbase = musb->ctrl_base; in tusb_allow_idle()
433 void __iomem *tbase = musb->ctrl_base; in tusb_musb_vbus_status()
558 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_vbus()
635 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_mode()
827 void __iomem *tbase = musb->ctrl_base; in tusb_musb_interrupt()
[all...]
H A Dda8xx.c88 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_enable()
107 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_disable()
167 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG, in otg_timer()
228 musb_writel(musb->ctrl_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK); in da8xx_babble_recover()
235 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_interrupt()
360 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_init()
453 void __iomem *reg_base = musb->ctrl_base; in da8xx_dma_controller_callback()
H A Dmusb_cppi41.c359 musb_writel(musb->ctrl_base, USB_CTRL_TX_MODE, new_mode); in cppi41_set_dma_mode()
362 musb_writel(musb->ctrl_base, USB_CTRL_RX_MODE, new_mode); in cppi41_set_dma_mode()
388 musb_writel(musb->ctrl_base, DA8XX_USB_MODE, new_mode); in da8xx_set_dma_mode()
407 musb_writel(controller->controller.musb->ctrl_base, in cppi41_set_autoreq_mode()
439 musb_writel(musb->ctrl_base, in cppi41_configure_channel()
449 musb_writel(musb->ctrl_base, in cppi41_configure_channel()
626 musb_writel(musb->ctrl_base, controller->tdown_reg, in cppi41_dma_channel_abort()
632 musb_writel(musb->ctrl_base, controller->tdown_reg, tdbit); in cppi41_dma_channel_abort()
H A Dtusb6010_omap.c585 void __iomem *tbase = musb->ctrl_base; in tusb_dma_controller_create()
591 musb_writel(musb->ctrl_base, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_dma_controller_create()
592 musb_writel(musb->ctrl_base, TUSB_DMA_EP_MAP, 0); in tusb_dma_controller_create()
604 tusb_dma->tbase = musb->ctrl_base; in tusb_dma_controller_create()
/linux/drivers/spi/
H A Dspi-ti-qspi.c47 struct regmap *ctrl_base; member
530 if (qspi->ctrl_base) { in ti_qspi_enable_memory_map()
531 regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, in ti_qspi_enable_memory_map()
544 if (qspi->ctrl_base) in ti_qspi_disable_memory_map()
545 regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, in ti_qspi_disable_memory_map()
831 qspi->ctrl_base = in ti_qspi_probe()
834 if (IS_ERR(qspi->ctrl_base)) { in ti_qspi_probe()
835 ret = PTR_ERR(qspi->ctrl_base); in ti_qspi_probe()
/linux/drivers/dma/
H A Ddma-jz4780.c151 void __iomem *ctrl_base; member
198 return readl(jzdma->ctrl_base + reg); in jz4780_dma_ctrl_readl()
204 writel(val, jzdma->ctrl_base + reg); in jz4780_dma_ctrl_writel()
884 jzdma->ctrl_base = devm_ioremap_resource(dev, res); in jz4780_dma_probe()
885 if (IS_ERR(jzdma->ctrl_base)) in jz4780_dma_probe()
886 return PTR_ERR(jzdma->ctrl_base); in jz4780_dma_probe()
893 jzdma->ctrl_base = jzdma->chn_base + JZ4780_DMA_CTRL_OFFSET; in jz4780_dma_probe()
H A Dfsl-qdma.c218 void __iomem *ctrl_base; member
590 void __iomem *block, *ctrl = fsl_qdma->ctrl_base; in fsl_qdma_halt()
772 void __iomem *block, *ctrl = fsl_qdma->ctrl_base; in fsl_qdma_queue_handler()
877 void __iomem *block, *ctrl = fsl_qdma->ctrl_base; in fsl_qdma_reg_init()
1188 fsl_qdma->ctrl_base = devm_platform_ioremap_resource(pdev, 0); in fsl_qdma_probe()
1189 if (IS_ERR(fsl_qdma->ctrl_base)) in fsl_qdma_probe()
1190 return PTR_ERR(fsl_qdma->ctrl_base); in fsl_qdma_probe()
/linux/arch/arm/kernel/
H A Dhw_breakpoint.c330 int i, max_slots, ctrl_base, val_base; in arch_install_hw_breakpoint() local
338 ctrl_base = ARM_BASE_BCR; in arch_install_hw_breakpoint()
344 ctrl_base = ARM_BASE_WCR; in arch_install_hw_breakpoint()
370 ctrl_base = ARM_BASE_BCR + core_num_brps; in arch_install_hw_breakpoint()
379 write_wb_reg(ctrl_base + i, ctrl); in arch_install_hw_breakpoint()
/linux/drivers/perf/
H A Darm-cci.c98 void __iomem *ctrl_base; member
370 rev = readl_relaxed(cci_pmu->ctrl_base + CCI_PID2) & CCI_PID2_REV_MASK; in probe_cci400_revision()
668 val = readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) | CCI_PMCR_CEN; in __cci_pmu_enable_nosync()
669 writel(val, cci_pmu->ctrl_base + CCI_PMCR); in __cci_pmu_enable_nosync()
685 val = readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) & ~CCI_PMCR_CEN; in __cci_pmu_disable()
686 writel(val, cci_pmu->ctrl_base + CCI_PMCR); in __cci_pmu_disable()
782 return (readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) & in pmu_get_max_counters()
1596 cci_pmu->ctrl_base = *(void __iomem **)dev->platform_data; in cci_pmu_alloc()
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c110 void __iomem *ctrl_base; member
193 return readl(msm_host->ctrl_base + reg); in dsi_read()
198 writel(data, msm_host->ctrl_base + reg); in dsi_write()
225 ret = dsi_get_version(msm_host->ctrl_base, &major, &minor); in dsi_get_config()
1651 if (!msm_host->ctrl_base) in dsi_host_irq()
1960 msm_host->ctrl_base = msm_ioremap_size(pdev, "dsi_ctrl", &msm_host->ctrl_size); in msm_dsi_host_init()
1961 if (IS_ERR(msm_host->ctrl_base)) in msm_dsi_host_init()
1962 return dev_err_probe(&pdev->dev, PTR_ERR(msm_host->ctrl_base), in msm_dsi_host_init()
1980 msm_host->ctrl_base += cfg->io_offset; in msm_dsi_host_init()
2577 msm_host->ctrl_base, "ds in msm_dsi_host_snapshot()
[all...]
/linux/drivers/net/ethernet/ti/
H A Ddavinci_emac.c315 void __iomem *ctrl_base; member
361 #define emac_ctrl_read(reg) ioread32((priv->ctrl_base + (reg)))
362 #define emac_ctrl_write(reg, val) iowrite32(val, (priv->ctrl_base + (reg)))
1868 priv->ctrl_base = in davinci_emac_probe()
1870 if (IS_ERR(priv->ctrl_base)) { in davinci_emac_probe()
1871 rc = PTR_ERR(priv->ctrl_base); in davinci_emac_probe()
1875 priv->ctrl_base = priv->remap_addr + pdata->ctrl_mod_reg_offset; in davinci_emac_probe()
/linux/drivers/net/ethernet/hisilicon/
H A Dhix5hd2_gmac.c250 void __iomem *ctrl_base; member
316 writel_relaxed(val, priv->ctrl_base); in hix5hd2_config_port()
1121 priv->ctrl_base = devm_platform_ioremap_resource(pdev, 1); in hix5hd2_dev_probe()
1122 if (IS_ERR(priv->ctrl_base)) { in hix5hd2_dev_probe()
1123 ret = PTR_ERR(priv->ctrl_base); in hix5hd2_dev_probe()

12