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Searched refs:csc (Results 1 – 25 of 75) sorted by relevance

123

/linux/drivers/gpu/ipu-v3/
H A Dipu-ic-csc.c355 static int calc_csc_coeffs(struct ipu_ic_csc *csc) in calc_csc_coeffs() argument
360 tbl_idx = (QUANT_MAP(csc->in_cs.quant) << 1) | in calc_csc_coeffs()
361 QUANT_MAP(csc->out_cs.quant); in calc_csc_coeffs()
363 if (csc->in_cs.cs == csc->out_cs.cs) { in calc_csc_coeffs()
364 csc->params = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? in calc_csc_coeffs()
372 switch (csc->out_cs.enc) { in calc_csc_coeffs()
374 params_tbl = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? in calc_csc_coeffs()
378 params_tbl = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? in calc_csc_coeffs()
385 csc->params = *params_tbl[tbl_idx]; in calc_csc_coeffs()
390 int __ipu_ic_calc_csc(struct ipu_ic_csc *csc) in __ipu_ic_calc_csc() argument
[all …]
H A Dipu-ic.c175 const struct ipu_ic_csc *csc, in init_csc() argument
188 c = (const u16 (*)[3])csc->params.coeff; in init_csc()
189 a = (const u16 *)csc->params.offset; in init_csc()
195 param = ((a[0] & 0x1fe0) >> 5) | (csc->params.scale << 8) | in init_csc()
196 (csc->params.sat << 10); in init_csc()
325 const struct ipu_ic_csc *csc, in ipu_ic_task_init_rsc() argument
359 ic->in_cs = csc->in_cs; in ipu_ic_task_init_rsc()
360 ic->out_cs = csc->out_cs; in ipu_ic_task_init_rsc()
362 ret = init_csc(ic, csc, 0); in ipu_ic_task_init_rsc()
369 const struct ipu_ic_csc *csc, in ipu_ic_task_init() argument
[all …]
H A Dipu-dp.c273 u32 reg, csc; in ipu_dp_disable_channel() local
283 csc = reg & DP_COM_CONF_CSC_DEF_MASK; in ipu_dp_disable_channel()
285 if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG) in ipu_dp_disable_channel()
/linux/drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/
H A Dia_css_csc.host.c60 const struct sh_css_isp_csc_params *csc, in ia_css_cc_dump() argument
64 if (!csc) return; in ia_css_cc_dump()
68 csc->m_shift); in ia_css_cc_dump()
71 csc->m00); in ia_css_cc_dump()
74 csc->m01); in ia_css_cc_dump()
77 csc->m02); in ia_css_cc_dump()
80 csc->m10); in ia_css_cc_dump()
83 csc->m11); in ia_css_cc_dump()
86 csc->m12); in ia_css_cc_dump()
89 csc->m20); in ia_css_cc_dump()
[all …]
H A Dia_css_csc.host.h30 const struct sh_css_isp_csc_params *csc, unsigned int level,
35 const struct sh_css_isp_csc_params *csc,
/linux/drivers/media/platform/ti/vpe/
H A Dcsc.c110 void csc_dump_regs(struct csc_data *csc) in csc_dump_regs() argument
112 struct device *dev = &csc->pdev->dev; in csc_dump_regs()
115 ioread32(csc->base + CSC_##r)) in csc_dump_regs()
117 dev_dbg(dev, "CSC Registers @ %pa:\n", &csc->res->start); in csc_dump_regs()
130 void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5) in csc_set_coeff_bypass() argument
139 void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0, in csc_set_coeff() argument
249 struct csc_data *csc; in csc_create() local
253 csc = devm_kzalloc(&pdev->dev, sizeof(*csc), GFP_KERNEL); in csc_create()
254 if (!csc) { in csc_create()
259 csc->pdev = pdev; in csc_create()
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H A Dcsc.h58 void csc_dump_regs(struct csc_data *csc);
59 void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5);
60 void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0,
/linux/drivers/gpu/drm/i915/display/
H A Dintel_color.c188 static void intel_csc_clear(struct intel_csc_matrix *csc) in intel_csc_clear() argument
190 memset(csc, 0, sizeof(*csc)); in intel_csc_clear()
226 const struct intel_csc_matrix *csc) in ilk_update_pipe_csc() argument
232 csc->preoff[0]); in ilk_update_pipe_csc()
234 csc->preoff[1]); in ilk_update_pipe_csc()
236 csc->preoff[2]); in ilk_update_pipe_csc()
239 csc->coeff[0] << 16 | csc->coeff[1]); in ilk_update_pipe_csc()
241 csc->coeff[2] << 16); in ilk_update_pipe_csc()
244 csc->coeff[3] << 16 | csc->coeff[4]); in ilk_update_pipe_csc()
246 csc->coeff[5] << 16); in ilk_update_pipe_csc()
[all …]
/linux/drivers/gpu/drm/tidss/
H A Dtidss_dispc.c1530 void (*to_regval)(const struct dispc_csc_coef *csc, u32 *regval);
1541 void dispc_csc_offset_regval(const struct dispc_csc_coef *csc, u32 *regval) in dispc_csc_offset_regval() argument
1544 regval[5] = OVAL(csc->preoffset[0], csc->preoffset[1]); in dispc_csc_offset_regval()
1545 regval[6] = OVAL(csc->preoffset[2], csc->postoffset[0]); in dispc_csc_offset_regval()
1546 regval[7] = OVAL(csc->postoffset[1], csc->postoffset[2]); in dispc_csc_offset_regval()
1552 void dispc_csc_yuv2rgb_regval(const struct dispc_csc_coef *csc, u32 *regval) in dispc_csc_yuv2rgb_regval() argument
1554 regval[0] = CVAL(csc->m[CSC_RY], csc->m[CSC_RCR]); in dispc_csc_yuv2rgb_regval()
1555 regval[1] = CVAL(csc->m[CSC_RCB], csc->m[CSC_GY]); in dispc_csc_yuv2rgb_regval()
1556 regval[2] = CVAL(csc->m[CSC_GCR], csc->m[CSC_GCB]); in dispc_csc_yuv2rgb_regval()
1557 regval[3] = CVAL(csc->m[CSC_BY], csc->m[CSC_BCR]); in dispc_csc_yuv2rgb_regval()
[all …]
/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_plane.c160 enum mdp4_pipe pipe, struct csc_cfg *csc) in mdp4_write_csc_config() argument
164 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) { in mdp4_write_csc_config()
166 csc->matrix[i]); in mdp4_write_csc_config()
169 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) { in mdp4_write_csc_config()
171 csc->pre_bias[i]); in mdp4_write_csc_config()
174 csc->post_bias[i]); in mdp4_write_csc_config()
177 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) { in mdp4_write_csc_config()
179 csc->pre_clamp[i]); in mdp4_write_csc_config()
182 csc->post_clamp[i]); in mdp4_write_csc_config()
316 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB); in mdp4_plane_mode_set() local
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_cdm.c175 u32 csc = 0; in dpu_hw_cdm_enable() local
195 csc |= CDM_CSC10_OP_MODE_DST_FMT_YUV; in dpu_hw_cdm_enable()
196 csc &= ~CDM_CSC10_OP_MODE_SRC_FMT_YUV; in dpu_hw_cdm_enable()
197 csc |= CDM_CSC10_OP_MODE_EN; in dpu_hw_cdm_enable()
202 DPU_REG_WRITE(c, CDM_CSC_10_OPMODE, csc); in dpu_hw_cdm_enable()
/linux/drivers/gpu/drm/vc4/
H A Dvc4_hvs.c1426 u32 csc[3][5]; member
1432 .csc = {
1439 .csc = {
1446 .csc = {
1455 .csc = {
1462 .csc = {
1469 .csc = {
1496 HVS_WRITE(CFC1_N_MA_CSC_COEFF_C00(i), coeffs->csc[0][0]); in vc6_hvs_hw_init()
1497 HVS_WRITE(CFC1_N_MA_CSC_COEFF_C01(i), coeffs->csc[0][1]); in vc6_hvs_hw_init()
1498 HVS_WRITE(CFC1_N_MA_CSC_COEFF_C02(i), coeffs->csc[0][2]); in vc6_hvs_hw_init()
[all …]
/linux/drivers/media/platform/amlogic/c3/isp/
H A Dc3-isp-params.c49 struct c3_isp_params_csc csc; member
452 const struct c3_isp_params_csc *csc = &block->csc; in c3_isp_params_cfg_csc() local
463 ISP_CM0_COEF00_01_MTX_00(csc->matrix[0][0])); in c3_isp_params_cfg_csc()
466 ISP_CM0_COEF00_01_MTX_01(csc->matrix[0][1])); in c3_isp_params_cfg_csc()
469 ISP_CM0_COEF02_10_MTX_02(csc->matrix[0][2])); in c3_isp_params_cfg_csc()
473 ISP_CM0_COEF02_10_MTX_10(csc->matrix[1][0])); in c3_isp_params_cfg_csc()
476 ISP_CM0_COEF11_12_MTX_11(csc->matrix[1][1])); in c3_isp_params_cfg_csc()
479 ISP_CM0_COEF11_12_MTX_12(csc->matrix[1][2])); in c3_isp_params_cfg_csc()
483 ISP_CM0_COEF20_21_MTX_20(csc->matrix[2][0])); in c3_isp_params_cfg_csc()
486 ISP_CM0_COEF20_21_MTX_21(csc->matrix[2][1])); in c3_isp_params_cfg_csc()
[all …]
/linux/drivers/pcmcia/
H A Di82092.c310 int csc; in i82092aa_interrupt() local
317 csc = indirect_read(i, I365_CSC); in i82092aa_interrupt()
319 if (csc == 0) /* no events on this socket */ in i82092aa_interrupt()
324 if (csc & I365_CSC_DETECT) { in i82092aa_interrupt()
332 if (csc & I365_CSC_STSCHG) in i82092aa_interrupt()
336 if (csc & I365_CSC_BVD1) in i82092aa_interrupt()
338 if (csc & I365_CSC_BVD2) in i82092aa_interrupt()
340 if (csc & I365_CSC_READY) in i82092aa_interrupt()
H A Dpd6729.c192 unsigned int csc; in pd6729_interrupt() local
195 csc = indirect_read(&socket[i], I365_CSC); in pd6729_interrupt()
196 if (csc == 0) /* no events on this socket */ in pd6729_interrupt()
202 if (csc & I365_CSC_DETECT) { in pd6729_interrupt()
211 events |= (csc & I365_CSC_STSCHG) in pd6729_interrupt()
215 events |= (csc & I365_CSC_BVD1) in pd6729_interrupt()
217 events |= (csc & I365_CSC_BVD2) in pd6729_interrupt()
219 events |= (csc & I365_CSC_READY) in pd6729_interrupt()
H A Dyenta_socket.c512 u8 csc; in yenta_interrupt() local
519 csc = exca_readb(socket, I365_CSC); in yenta_interrupt()
521 if (!(cb_event || csc)) in yenta_interrupt()
525 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; in yenta_interrupt()
527 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; in yenta_interrupt()
529 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; in yenta_interrupt()
530 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; in yenta_interrupt()
531 events |= (csc & I365_CSC_READY) ? SS_READY : 0; in yenta_interrupt()
970 u8 csc; in yenta_probe_handler() local
976 csc = exca_readb(socket, I365_CSC); in yenta_probe_handler()
[all …]
/linux/drivers/staging/media/deprecated/atmel/
H A Datmel-sama7g5-isc.c215 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama7g5_config_csc()
217 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama7g5_config_csc()
219 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama7g5_config_csc()
221 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama7g5_config_csc()
223 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama7g5_config_csc()
225 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama7g5_config_csc()
429 isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET; in microchip_xisc_probe()
H A Datmel-sama5d2-isc.c202 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama5d2_config_csc()
204 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama5d2_config_csc()
206 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama5d2_config_csc()
208 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama5d2_config_csc()
210 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama5d2_config_csc()
212 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama5d2_config_csc()
440 isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; in atmel_isc_probe()
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dwndw.c142 if (clr.csc ) wndw->func-> csc_clr(wndw); in nv50_wndw_flush_clr()
170 if (asyw->set.csc ) wndw->func->csc_set (wndw, asyw); in nv50_wndw_flush_set()
427 if (wndw->func->csc && asyh->state.ctm) { in nv50_wndw_atomic_check_lut()
429 wndw->func->csc(wndw, asyw, ctm); in nv50_wndw_atomic_check_lut()
430 asyw->csc.valid = true; in nv50_wndw_atomic_check_lut()
431 asyw->set.csc = true; in nv50_wndw_atomic_check_lut()
433 asyw->csc.valid = false; in nv50_wndw_atomic_check_lut()
434 asyw->clr.csc = armw->csc.valid; in nv50_wndw_atomic_check_lut()
515 asyw->clr.csc = armw->csc.valid; in nv50_wndw_atomic_check()
740 asyw->csc = armw->csc; in nv50_wndw_atomic_duplicate_state()
H A Dbase907c.c144 u32 *val = &asyw->csc.matrix[j * 4 + i]; in base907c_csc()
181 NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]), in base907c_csc_set()
183 SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11); in base907c_csc_set()
198 .csc = base907c_csc,
/linux/drivers/media/platform/microchip/
H A Dmicrochip-sama5d2-isc.c222 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama5d2_config_csc()
224 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama5d2_config_csc()
226 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama5d2_config_csc()
228 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama5d2_config_csc()
230 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama5d2_config_csc()
232 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama5d2_config_csc()
459 isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; in microchip_isc_probe()
H A Dmicrochip-sama7g5-isc.c235 regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc, in isc_sama7g5_config_csc()
237 regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc, in isc_sama7g5_config_csc()
239 regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc, in isc_sama7g5_config_csc()
241 regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc, in isc_sama7g5_config_csc()
243 regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc, in isc_sama7g5_config_csc()
245 regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc, in isc_sama7g5_config_csc()
448 isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET; in microchip_xisc_probe()
/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_plane.c494 struct csc_cfg *csc) in csc_enable() argument
499 if (unlikely(!csc)) in csc_enable()
502 if ((csc->type == CSC_YUV2RGB) || (CSC_YUV2YUV == csc->type)) in csc_enable()
504 if ((csc->type == CSC_RGB2YUV) || (CSC_YUV2YUV == csc->type)) in csc_enable()
509 matrix = csc->matrix; in csc_enable()
525 for (i = 0; i < ARRAY_SIZE(csc->pre_bias); i++) { in csc_enable()
526 uint32_t *pre_clamp = csc->pre_clamp; in csc_enable()
527 uint32_t *post_clamp = csc->post_clamp; in csc_enable()
538 MDP5_PIPE_CSC_1_PRE_BIAS_REG_VALUE(csc->pre_bias[i])); in csc_enable()
541 MDP5_PIPE_CSC_1_POST_BIAS_REG_VALUE(csc->post_bias[i])); in csc_enable()
/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-subdev-enum-mbus-code.rst118 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
125 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
132 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
139 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
146 ioctl with :ref:`V4L2_MBUS_FRAMEFMT_SET_CSC <mbus-framefmt-set-csc>` set.
/linux/arch/alpha/kernel/
H A Dcore_tsunami.c396 printk("%s: CSR_CSC 0x%lx\n", __func__, TSUNAMI_cchip->csc.csr); in tsunami_init_arch()
417 if (TSUNAMI_cchip->csc.csr & 1L<<14) in tsunami_init_arch()
448 if (TSUNAMI_cchip->csc.csr & 1L<<14) in tsunami_kill_arch()
467 if (TSUNAMI_cchip->csc.csr & 1L<<14) in tsunami_pci_clr_err()

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