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Searched refs:comm_page (Results 1 – 20 of 20) sorted by relevance

/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.c35 if (chip->comm_page->handshake) { in wait_handshake()
479 if (snd_BUG_ON(!chip->comm_page)) in load_firmware()
528 chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index); in set_nominal_level()
530 chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index); in set_nominal_level()
550 chip->comm_page->line_out_level[channel] = gain; in set_output_gain()
569 chip->comm_page->monitors[monitor_index(chip, output, input)] = gain; in set_monitor_gain()
607 memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED, in set_meters_on()
609 memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED, in set_meters_on()
632 meters[n++] = chip->comm_page->vu_meter[m]; in get_audio_meters()
633 meters[n++] = chip->comm_page->peak_meter[m]; in get_audio_meters()
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H A Dgina20_dsp.c71 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
118 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
119 chip->comm_page->gd_clock_state = clock_state; in set_sample_rate()
120 chip->comm_page->gd_spdif_status = spdif_status; in set_sample_rate()
121 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ in set_sample_rate()
148 chip->comm_page->gd_clock_state = GD_CLOCK_SPDIFIN; in set_input_clock()
149 chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_NOCHANGE; in set_input_clock()
175 chip->comm_page->line_in_level[input] = gain; in set_input_gain()
195 chip->comm_page->flags |= in set_professional_spdif()
198 chip->comm_page->flags &= in set_professional_spdif()
H A Dechoaudio_3g.c28 chip->comm_page->ext_box_status = cpu_to_le32(E3G_ASIC_NOT_LOADED); in check_asic_status()
38 box_status = le32_to_cpu(chip->comm_page->ext_box_status); in check_asic_status()
51 return le32_to_cpu(chip->comm_page->e3g_frq_register); in get_frq_reg()
72 if (ctl_reg != chip->comm_page->control_register || in write_control_reg()
73 frq_reg != chip->comm_page->e3g_frq_register || force) { in write_control_reg()
74 chip->comm_page->e3g_frq_register = frq_reg; in write_control_reg()
75 chip->comm_page->control_register = ctl_reg; in write_control_reg()
165 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_professional_spdif()
183 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
251 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
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H A Dlayla24_dsp.c81 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
159 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
165 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
219 chip->comm_page->sample_rate = in set_sample_rate()
228 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ in set_sample_rate()
243 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
245 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
293 monitors = kmemdup(chip->comm_page->monitors, in switch_asic()
298 memset(chip->comm_page->monitors, ECHOGAIN_MUTED, in switch_asic()
304 memcpy(chip->comm_page->monitors, monitors, in switch_asic()
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H A Dlayla20_dsp.c72 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
156 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
166 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
201 chip->comm_page->input_clock = cpu_to_le16(clock); in set_input_clock()
230 chip->comm_page->output_clock = cpu_to_le16(clock); in set_output_clock()
249 chip->comm_page->line_in_level[input] = gain; in set_input_gain()
269 chip->comm_page->flags |= in set_professional_spdif()
272 chip->comm_page->flags &= in set_professional_spdif()
H A Dmia_dsp.c74 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
125 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { in set_sample_rate()
129 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
130 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
169 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
204 chip->comm_page->flags |= in set_professional_spdif()
207 chip->comm_page->flags &= in set_professional_spdif()
H A Dmidi.c31 chip->comm_page->flags |= in enable_midi_input()
34 chip->comm_page->flags &= in enable_midi_input()
57 chip->comm_page->midi_output[0] = bytes; in write_midi()
58 memcpy(&chip->comm_page->midi_output[1], data, bytes); in write_midi()
59 chip->comm_page->midi_out_free_count = 0; in write_midi()
106 count = le16_to_cpu(chip->comm_page->midi_input[0]); in midi_service_irq()
115 midi_byte = le16_to_cpu(chip->comm_page->midi_input[i]); in midi_service_irq()
H A Dgina24_dsp.c89 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
162 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
169 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
212 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
227 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
229 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
301 control_reg = le32_to_cpu(chip->comm_page->control_register); in dsp_set_digital_mode()
H A Ddarla20_dsp.c102 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
103 chip->comm_page->gd_clock_state = clock_state; in set_sample_rate()
104 chip->comm_page->gd_spdif_status = spdif_status; in set_sample_rate()
105 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ in set_sample_rate()
H A Dmona_dsp.c82 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
194 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
231 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
275 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
291 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
293 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
377 control_reg = le32_to_cpu(chip->comm_page->control_register); in dsp_set_digital_mode()
H A Dindigo_dsp.c104 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { in set_sample_rate()
108 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
109 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
135 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
H A Dindigodj_dsp.c104 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { in set_sample_rate()
108 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
109 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
135 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
H A Dindigo_express_dsp.c21 old_control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
51 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
76 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
H A Ddarla24_dsp.c64 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
134 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ in set_sample_rate()
135 chip->comm_page->gd_clock_state = clock; in set_sample_rate()
H A Decho3g_dsp.c44 chip->comm_page->e3g_frq_register = in init_hw()
106 u32 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_phantom_power()
115 le32_to_cpu(chip->comm_page->e3g_frq_register), in set_phantom_power()
H A Dechoaudio_gml.c63 if (reg_value != chip->comm_page->control_register || force) { in write_control_reg()
66 chip->comm_page->control_register = reg_value; in write_control_reg()
147 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_professional_spdif()
H A Dindigoio_dsp.c83 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
105 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
H A Dechoaudio.h349 struct comm_page *comm_page; /* Virtual address of the memory member
442 chip->comm_page->handshake = 0; in clear_handshake()
H A Dechoaudio.c1853 if (chip->comm_page) in snd_echo_free()
1919 sizeof(struct comm_page)); in snd_echo_create()
1923 chip->comm_page = (struct comm_page *)chip->commpage_dma_buf->area; in snd_echo_create()
2141 struct comm_page *commpage, *commpage_bak; in snd_echo_resume()
2145 commpage = chip->comm_page; in snd_echo_resume()
H A Dechoaudio_dsp.h630 struct comm_page { /* Base Length*/ struct