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Searched refs:clk_set_rate_range (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/clk/
H A Dclk_test.c400 clk_set_rate_range(clk, in clk_test_uncached_set_range()
431 clk_set_rate_range(clk, in clk_test_uncached_updated_rate_set_range()
576 ret = clk_set_rate_range(clk, in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
805 ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_modified()
841 ret = clk_set_rate_range(clk, in clk_test_orphan_transparent_multiple_parent_mux_set_parent_set_range_untouched()
868 ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2); in clk_test_orphan_transparent_multiple_parent_mux_set_range_round_rate()
1046 ret = clk_set_rate_range(parent, 1000, 2000); in clk_test_single_parent_mux_set_range_disjoint_child_last()
1049 ret = clk_set_rate_range(clk, 3000, 4000); in clk_test_single_parent_mux_set_range_disjoint_child_last()
1076 ret = clk_set_rate_range(clk, 1000, 2000); in clk_test_single_parent_mux_set_range_disjoint_parent_last()
1079 ret = clk_set_rate_range(parent, 3000, 4000); in clk_test_single_parent_mux_set_range_disjoint_parent_last()
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H A Dclk.c2734 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) in clk_set_rate_range() function
2749 EXPORT_SYMBOL_GPL(clk_set_rate_range);
2765 return clk_set_rate_range(clk, rate, clk->max_rate); in clk_set_min_rate()
2783 return clk_set_rate_range(clk, clk->min_rate, rate); in clk_set_max_rate()
/linux/include/linux/
H A Dclk.h914 * clk_set_rate_range - set a rate range for a clock source
921 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max);
1131 static inline int clk_set_rate_range(struct clk *clk, unsigned long min, in clk_set_min_rate()
1216 return clk_set_rate_range(clk, 0, ULONG_MAX); in clk_drop_range()
1124 static inline int clk_set_rate_range(struct clk *clk, unsigned long min, clk_set_rate_range() function
/linux/include/trace/events/
H A Dclk.h158 DEFINE_EVENT(clk_rate_range, clk_set_rate_range,
/linux/drivers/memory/tegra/
H A Dtegra186-emc.c202 err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, emc->debugfs.max_rate); in tegra186_emc_get_emc_dvfs_latency()
H A Dtegra20-emc.c925 err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, in tegra20_emc_debugfs_init()
H A Dtegra124-emc.c1257 err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, in emc_debugfs_init()
H A Dtegra30-emc.c1443 err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, in tegra30_emc_debugfs_init()
H A Dtegra210-emc-core.c1740 err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, in tegra210_emc_debugfs_init()