Searched refs:clk_cycle (Results 1 – 2 of 2) sorted by relevance
304 int div, clk_cycle, temp; in exynos5_i2c_set_timing() local 340 * clk_cycle := TSCLK_L + TSCLK_H in exynos5_i2c_set_timing() 341 * temp := (CLK_DIV + 1) * (clk_cycle + 2) in exynos5_i2c_set_timing() 348 * clk_cycle := TSCLK_L + TSCLK_H in exynos5_i2c_set_timing() 351 * Constraints: 4 <= temp, 0 <= CLK_DIV < 256, 2 <= clk_cycle <= 510 in exynos5_i2c_set_timing() 381 clk_cycle = (temp + ((t_ftl_cycle + 3) % (div + 1)) * 2) / in exynos5_i2c_set_timing() 384 clk_cycle = temp / (div + 1) - 2; in exynos5_i2c_set_timing() 385 if (temp < 4 || div >= 256 || clk_cycle < 2) { in exynos5_i2c_set_timing() 392 * Scale clk_cycle to get t_scl_l using the proption factors for individual I2C modes. in exynos5_i2c_set_timing() 395 t_scl_l = clk_cycle * 53 in exynos5_i2c_set_timing() [all...]
44 unsigned int clk_cycle; member 292 unsigned int cyc = priv->clk_cycle; in uniphier_i2c_hw_init() 341 priv->clk_cycle = clk_rate / bus_speed; in uniphier_i2c_probe()