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Searched refs:clk_bypass (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8qm-ldb.c52 struct clk *clk_bypass; member
151 clk_set_rate(imx8qm_ldb->clk_bypass, di_clk); in imx8qm_ldb_bridge_mode_set()
216 clk_prepare_enable(imx8qm_ldb->clk_bypass); in imx8qm_ldb_bridge_atomic_enable()
280 clk_disable_unprepare(imx8qm_ldb->clk_bypass); in imx8qm_ldb_bridge_atomic_disable()
466 imx8qm_ldb->clk_bypass = devm_clk_get(dev, "bypass"); in imx8qm_ldb_probe()
467 if (IS_ERR(imx8qm_ldb->clk_bypass)) { in imx8qm_ldb_probe()
468 ret = PTR_ERR(imx8qm_ldb->clk_bypass); in imx8qm_ldb_probe()
H A Dimx8qxp-ldb.c49 struct clk *clk_bypass; member
174 clk_set_rate(imx8qxp_ldb->clk_bypass, di_clk); in imx8qxp_ldb_bridge_mode_set()
228 clk_prepare_enable(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_bridge_atomic_pre_enable()
291 clk_disable_unprepare(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_bridge_atomic_disable()
617 imx8qxp_ldb->clk_bypass = devm_clk_get(dev, "bypass"); in imx8qxp_ldb_probe()
618 if (IS_ERR(imx8qxp_ldb->clk_bypass)) { in imx8qxp_ldb_probe()
619 ret = PTR_ERR(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_probe()
/linux/drivers/clk/ti/
H A Ddpll44xx.c159 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap4_dpll_regm4xen_determine_rate()
161 req->best_parent_hw = dd->clk_bypass; in omap4_dpll_regm4xen_determine_rate()
H A Dfapll.c64 struct clk *clk_bypass; member
580 fd->clk_bypass = of_clk_get(node, 1); in ti_fapll_setup()
581 if (IS_ERR(fd->clk_bypass)) { in ti_fapll_setup()
663 if (fd->clk_bypass) in ti_fapll_setup()
664 clk_put(fd->clk_bypass); in ti_fapll_setup()
H A Ddpll3xxx.c546 if (clk_hw_get_rate(hw) == clk_hw_get_rate(dd->clk_bypass)) { in omap3_noncore_dpll_enable()
547 WARN_ON(parent != dd->clk_bypass); in omap3_noncore_dpll_enable()
599 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap3_noncore_dpll_determine_rate()
601 req->best_parent_hw = dd->clk_bypass; in omap3_noncore_dpll_determine_rate()
H A Dclkt_dpll.c254 return clk_hw_get_rate(dd->clk_bypass); in omap2_get_dpll_rate()
H A Dapll.c160 ad->clk_bypass = __clk_get_hw(clk); in omap_clk_register_apll()
H A Ddpll.c178 dd->clk_bypass = __clk_get_hw(clk); in _register_dpll()
/linux/include/linux/clk/
H A Dti.h91 struct clk_hw *clk_bypass; member
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h236 struct clk_bypass { struct