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Searched refs:cfg5 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/v3d/
H A Dv3d_trace.h187 TP_PROTO(struct drm_device *dev, u32 cfg5, u32 cfg6),
188 TP_ARGS(dev, cfg5, cfg6),
192 __field(u32, cfg5)
198 __entry->cfg5 = cfg5;
204 __entry->cfg5,
/linux/drivers/memory/tegra/
H A Dtegra210-emc-core.c1225 u32 cmd_pad, dq_pad, rfu1, cfg5, common_tx, ramp_up_wait = 0; in tegra210_emc_dvfs_power_ramp_up() local
1236 cfg5 = timing->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_up()
1314 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1320 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1326 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1340 u32 ramp_down_wait = 0, cmd_pad, dq_pad, rfu1, cfg5, common_tx; in tegra210_emc_dvfs_power_ramp_down() local
1352 cfg5 = entry->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_down()
1358 ccfifo_writel(emc, cfg5 | EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_down()
/linux/drivers/hwmon/
H A Dlm85.c59 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_OFF64))
61 ((data)->type == adt7468 && !((data)->cfg5 & ADT7468_HFPWM))
316 u8 cfg5; /* Config Register 5 on ADT7468 */ member
417 data->cfg5 = lm85_read_value(client, ADT7468_REG_CFG5); in lm85_update_device()
814 data->cfg5 &= ~ADT7468_HFPWM; in pwm_freq_store()
815 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
823 data->cfg5 |= ADT7468_HFPWM; in pwm_freq_store()
824 lm85_write_value(client, ADT7468_REG_CFG5, data->cfg5); in pwm_freq_store()
/linux/arch/mips/kvm/
H A Dmips.c1371 unsigned int sr, cfg5; in kvm_own_fpu() local
1393 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_fpu()
1394 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_fpu()
1415 unsigned int sr, cfg5; in kvm_own_msa() local
1437 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_msa()
1438 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_msa()
/linux/drivers/net/ethernet/realtek/
H A D8139too.c2300 u8 cfg5 = RTL_R8 (Config5); in rtl8139_get_wol() local
2312 if (cfg5 & Cfg5_UWF) in rtl8139_get_wol()
2314 if (cfg5 & Cfg5_MWF) in rtl8139_get_wol()
2316 if (cfg5 & Cfg5_BWF) in rtl8139_get_wol()
2331 u8 cfg3, cfg5; in rtl8139_set_wol() local
2350 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); in rtl8139_set_wol()
2355 cfg5 |= Cfg5_UWF; in rtl8139_set_wol()
2357 cfg5 |= Cfg5_MWF; in rtl8139_set_wol()
2359 cfg5 |= Cfg5_BWF; in rtl8139_set_wol()
2360 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ in rtl8139_set_wol()
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c15253 u32 cfg2 = 0, cfg4 = 0, cfg5 = 0; in tg3_get_eeprom_hw_cfg() local
15274 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_5, &cfg5); in tg3_get_eeprom_hw_cfg()
15429 if (cfg5 & NIC_SRAM_DISABLE_1G_HALF_ADV) in tg3_get_eeprom_hw_cfg()