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Searched refs:cci_write (Results 1 – 25 of 32) sorted by relevance

12

/linux/drivers/media/i2c/
H A Dvd56g3.c396 cci_write(sensor->regmap, VD56G3_REG_DUSTER_CTRL, duster, &ret); in vd56g3_update_patgen()
397 cci_write(sensor->regmap, VD56G3_REG_DARKCAL_CTRL, darkcal, &ret); in vd56g3_update_patgen()
398 cci_write(sensor->regmap, VD56G3_REG_PATGEN_CTRL, patgen, &ret); in vd56g3_update_patgen()
409 cci_write(sensor->regmap, VD56G3_REG_EXP_MODE, expo_state, in vd56g3_update_expo_cluster()
414 cci_write(sensor->regmap, in vd56g3_update_expo_cluster()
417 cci_write(sensor->regmap, VD56G3_REG_AE_COLDSTART_ANALOG_GAIN, in vd56g3_update_expo_cluster()
419 cci_write(sensor->regmap, VD56G3_REG_AE_COLDSTART_DIGITAL_GAIN, in vd56g3_update_expo_cluster()
425 cci_write(sensor->regmap, VD56G3_REG_MANUAL_COARSE_EXPOSURE, in vd56g3_update_expo_cluster()
429 cci_write(sensor->regmap, VD56G3_REG_MANUAL_ANALOG_GAIN, in vd56g3_update_expo_cluster()
433 cci_write(sensor->regmap, VD56G3_REG_MANUAL_DIGITAL_GAIN_CH0, in vd56g3_update_expo_cluster()
[all …]
H A Ddw9719.c108 if (cci_write(dw9719->regmap, reg_pwr, DW9719_SHUTDOWN, NULL)) in dw9719_power_down()
131 cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, NULL); in dw9719_power_up()
134 cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, &ret); in dw9719_power_up()
192 cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret); in dw9719_power_up()
193 cci_write(dw9719->regmap, DW9719_MODE, in dw9719_power_up()
195 cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret); in dw9719_power_up()
200 cci_write(dw9719->regmap, DW9718S_CONTROL, in dw9719_power_up()
205 cci_write(dw9719->regmap, DW9718S_SACT, in dw9719_power_up()
207 cci_write(dw9719->regmap, DW9718S_SW, in dw9719_power_up()
211 cci_write(dw9719->regmap, DW9761_VCM_PRELOAD, in dw9719_power_up()
[all …]
H A Dimx283.c738 return cci_write(imx283->cci, IMX283_REG_TPG_CTRL, 0x00, NULL); in imx283_update_test_pattern()
740 ret = cci_write(imx283->cci, IMX283_REG_TPG_PAT, in imx283_update_test_pattern()
745 return cci_write(imx283->cci, IMX283_REG_TPG_CTRL, in imx283_update_test_pattern()
801 ret = cci_write(imx283->cci, IMX283_REG_SHR, shr, NULL); in imx283_set_ctrl()
809 ret = cci_write(imx283->cci, IMX283_REG_HMAX, imx283->hmax, NULL); in imx283_set_ctrl()
816 ret = cci_write(imx283->cci, IMX283_REG_VMAX, imx283->vmax, NULL); in imx283_set_ctrl()
820 ret = cci_write(imx283->cci, IMX283_REG_ANALOG_GAIN, ctrl->val, NULL); in imx283_set_ctrl()
824 ret = cci_write(imx283->cci, IMX283_REG_DIGITAL_GAIN, ctrl->val, NULL); in imx283_set_ctrl()
833 cci_write(imx283->cci, IMX283_REG_HTRIMMING, in imx283_set_ctrl()
836 cci_write(imx283->cci, IMX283_REG_HTRIMMING, in imx283_set_ctrl()
[all …]
H A Dov4689.c383 return cci_write(ov4689->regmap, OV4689_REG_TEST_PATTERN, in ov4689_enable_test_pattern()
421 cci_write(rm, OV4689_REG_H_CROP_START, 8, &ret); in ov4689_setup_timings()
422 cci_write(rm, OV4689_REG_V_CROP_START, 8, &ret); in ov4689_setup_timings()
423 cci_write(rm, OV4689_REG_H_CROP_END, 2711, &ret); in ov4689_setup_timings()
424 cci_write(rm, OV4689_REG_V_CROP_END, 1531, &ret); in ov4689_setup_timings()
426 cci_write(rm, OV4689_REG_H_OUTPUT_SIZE, mode->width, &ret); in ov4689_setup_timings()
427 cci_write(rm, OV4689_REG_V_OUTPUT_SIZE, mode->height, &ret); in ov4689_setup_timings()
429 cci_write(rm, OV4689_REG_H_WIN_OFF, 8, &ret); in ov4689_setup_timings()
430 cci_write(rm, OV4689_REG_V_WIN_OFF, 4, &ret); in ov4689_setup_timings()
432 cci_write(rm, OV4689_REG_VFIFO_CTRL_01, 167, &ret); in ov4689_setup_timings()
[all …]
H A Dvgxy61.c580 cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_SHORT, 0, &ret); in vgxy61_apply_exposure()
581 cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_LONG, in vgxy61_apply_exposure()
583 cci_write(sensor->regmap, VGXY61_REG_COARSE_EXPOSURE_SHORT, in vgxy61_apply_exposure()
745 return cci_write(sensor->regmap, VGXY61_REG_ANALOG_GAIN, target, in vgxy61_update_analog_gain()
760 cci_write(sensor->regmap, VGXY61_REG_DIGITAL_GAIN_LONG, digital_gain, in vgxy61_apply_digital_gain()
762 cci_write(sensor->regmap, VGXY61_REG_DIGITAL_GAIN_SHORT, digital_gain, in vgxy61_apply_digital_gain()
788 return cci_write(sensor->regmap, VGXY61_REG_PATGEN_CTRL, reg, NULL); in vgxy61_apply_patgen()
856 cci_write(sensor->regmap, VGXY61_REG_GPIO_0_CTRL, polarity << 1, &ret); in vgxy61_update_gpios_strobe_polarity()
857 cci_write(sensor->regmap, VGXY61_REG_GPIO_1_CTRL, polarity << 1, &ret); in vgxy61_update_gpios_strobe_polarity()
858 cci_write(sensor->regmap, VGXY61_REG_GPIO_2_CTRL, polarity << 1, &ret); in vgxy61_update_gpios_strobe_polarity()
[all …]
H A Dimx290.c680 cci_write(imx290->regmap, IMX290_INCKSEL1, clk_cfg->incksel1, &ret); in imx290_set_clock()
681 cci_write(imx290->regmap, IMX290_INCKSEL2, clk_cfg->incksel2, &ret); in imx290_set_clock()
682 cci_write(imx290->regmap, IMX290_INCKSEL3, clk_cfg->incksel3, &ret); in imx290_set_clock()
683 cci_write(imx290->regmap, IMX290_INCKSEL4, clk_cfg->incksel4, &ret); in imx290_set_clock()
684 cci_write(imx290->regmap, IMX290_INCKSEL5, clk_cfg->incksel5, &ret); in imx290_set_clock()
685 cci_write(imx290->regmap, IMX290_INCKSEL6, clk_cfg->incksel6, &ret); in imx290_set_clock()
694 cci_write(imx290->regmap, IMX290_PHY_LANE_NUM, imx290->nlanes - 1, in imx290_set_data_lanes()
696 cci_write(imx290->regmap, IMX290_CSI_LANE_MODE, imx290->nlanes - 1, in imx290_set_data_lanes()
698 cci_write(imx290->regmap, IMX290_FR_FDG_SEL, 0x01, &ret); in imx290_set_data_lanes()
709 return cci_write(imx290->regmap, IMX290_BLKLEVEL, in imx290_set_black_level()
[all …]
H A Dov02e10.c286 cci_write(ov02e10->regmap, OV02E10_REG_TEST_PATTERN, pattern, pret); in ov02e10_test_pattern()
314 ret = cci_write(ov02e10->regmap, OV02E10_REG_COMMAND_UPDATE, in ov02e10_set_ctrl()
319 cci_write(ov02e10->regmap, OV02E10_REG_PAGE_FLAG, in ov02e10_set_ctrl()
321 cci_write(ov02e10->regmap, OV02E10_REG_ANALOG_GAIN, in ov02e10_set_ctrl()
326 cci_write(ov02e10->regmap, OV02E10_REG_PAGE_FLAG, in ov02e10_set_ctrl()
328 cci_write(ov02e10->regmap, OV02E10_REG_DIGITAL_GAIN, in ov02e10_set_ctrl()
333 cci_write(ov02e10->regmap, OV02E10_REG_PAGE_FLAG, in ov02e10_set_ctrl()
335 cci_write(ov02e10->regmap, OV02E10_REG_EXPOSURE, in ov02e10_set_ctrl()
341 cci_write(ov02e10->regmap, OV02E10_REG_PAGE_FLAG, in ov02e10_set_ctrl()
343 cci_write(ov02e10->regmap, OV02E10_REG_ORIENTATION, in ov02e10_set_ctrl()
[all …]
H A Dimx214.c766 cci_write(imx214->regmap, IMX214_REG_VTPXCK_DIV, in imx214_configure_pll()
768 cci_write(imx214->regmap, IMX214_REG_VTSYCK_DIV, in imx214_configure_pll()
770 cci_write(imx214->regmap, IMX214_REG_PREPLLCK_VT_DIV, in imx214_configure_pll()
772 cci_write(imx214->regmap, IMX214_REG_PLL_VT_MPY, in imx214_configure_pll()
774 cci_write(imx214->regmap, IMX214_REG_OPPXCK_DIV, in imx214_configure_pll()
776 cci_write(imx214->regmap, IMX214_REG_OPSYCK_DIV, in imx214_configure_pll()
778 cci_write(imx214->regmap, IMX214_REG_PLL_MULT_DRIV, in imx214_configure_pll()
780 cci_write(imx214->regmap, IMX214_REG_EXCK_FREQ, in imx214_configure_pll()
790 cci_write(imx214->regmap, IMX214_REG_DIG_GAIN_GREENR, val, &ret); in imx214_update_digital_gain()
791 cci_write(imx214->regmap, IMX214_REG_DIG_GAIN_RED, val, &ret); in imx214_update_digital_gain()
[all …]
H A Dst-mipid02.c462 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1, 0, &ret); in mipid02_disable_streams()
463 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1, 0, &ret); in mipid02_disable_streams()
464 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1, 0, &ret); in mipid02_disable_streams()
509 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1, in mipid02_enable_streams()
511 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG3, CLK_MIPI_CSI, &ret); in mipid02_enable_streams()
512 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1, in mipid02_enable_streams()
514 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG2, DATA_MIPI_CSI, &ret); in mipid02_enable_streams()
515 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1, in mipid02_enable_streams()
517 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG2, DATA_MIPI_CSI, &ret); in mipid02_enable_streams()
518 cci_write(bridge->regmap, MIPID02_MODE_REG1, in mipid02_enable_streams()
[all …]
H A Dov2680.c385 cci_write(sensor->regmap, OV2680_REG_SENSOR_CTRL_0A, in ov2680_set_mode()
387 cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_START, in ov2680_set_mode()
389 cci_write(sensor->regmap, OV2680_REG_VERTICAL_START, in ov2680_set_mode()
391 cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_END, in ov2680_set_mode()
393 cci_write(sensor->regmap, OV2680_REG_VERTICAL_END, in ov2680_set_mode()
395 cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_OUTPUT_SIZE, in ov2680_set_mode()
397 cci_write(sensor->regmap, OV2680_REG_VERTICAL_OUTPUT_SIZE, in ov2680_set_mode()
399 cci_write(sensor->regmap, OV2680_REG_TIMING_HTS, in ov2680_set_mode()
402 cci_write(sensor->regmap, OV2680_REG_ISP_X_WIN, 0, &ret); in ov2680_set_mode()
403 cci_write(sensor->regmap, OV2680_REG_ISP_Y_WIN, 0, &ret); in ov2680_set_mode()
[all …]
H A Dimx415.c673 cci_write(sensor->regmap, IMX415_BLKLEVEL, 0x00, &ret); in imx415_set_testpattern()
674 cci_write(sensor->regmap, IMX415_TPG_EN_DUOUT, 0x01, &ret); in imx415_set_testpattern()
675 cci_write(sensor->regmap, IMX415_TPG_PATSEL_DUOUT, in imx415_set_testpattern()
677 cci_write(sensor->regmap, IMX415_TPG_COLORWIDTH, 0x01, &ret); in imx415_set_testpattern()
678 cci_write(sensor->regmap, IMX415_TESTCLKEN_MIPI, 0x20, &ret); in imx415_set_testpattern()
679 cci_write(sensor->regmap, IMX415_DIG_CLP_MODE, 0x00, &ret); in imx415_set_testpattern()
680 cci_write(sensor->regmap, IMX415_WRJ_OPEN, 0x00, &ret); in imx415_set_testpattern()
682 cci_write(sensor->regmap, IMX415_BLKLEVEL, in imx415_set_testpattern()
684 cci_write(sensor->regmap, IMX415_TPG_EN_DUOUT, 0x00, &ret); in imx415_set_testpattern()
685 cci_write(sensor->regmap, IMX415_TESTCLKEN_MIPI, 0x00, &ret); in imx415_set_testpattern()
[all …]
H A Dmax96714.c173 cci_write(priv->regmap, MAX96714_PATGEN_VS_DLY, 0, &ret); in max96714_apply_patgen_timing()
174 cci_write(priv->regmap, MAX96714_PATGEN_VS_HIGH, v_sw * h_tot, &ret); in max96714_apply_patgen_timing()
175 cci_write(priv->regmap, MAX96714_PATGEN_VS_LOW, in max96714_apply_patgen_timing()
177 cci_write(priv->regmap, MAX96714_PATGEN_HS_HIGH, h_sw, &ret); in max96714_apply_patgen_timing()
178 cci_write(priv->regmap, MAX96714_PATGEN_HS_LOW, h_active + h_fp + h_bp, in max96714_apply_patgen_timing()
180 cci_write(priv->regmap, MAX96714_PATGEN_V2D, in max96714_apply_patgen_timing()
182 cci_write(priv->regmap, MAX96714_PATGEN_HS_CNT, v_tot, &ret); in max96714_apply_patgen_timing()
183 cci_write(priv->regmap, MAX96714_PATGEN_DE_HIGH, h_active, &ret); in max96714_apply_patgen_timing()
184 cci_write(priv->regmap, MAX96714_PATGEN_DE_LOW, h_fp + h_sw + h_bp, in max96714_apply_patgen_timing()
186 cci_write(priv->regmap, MAX96714_PATGEN_DE_CNT, v_active, &ret); in max96714_apply_patgen_timing()
[all …]
H A Dmax96717.c197 cci_write(priv->regmap, MAX96717_VTX_VS_DLY, 0, &ret); in max96717_apply_patgen_timing()
198 cci_write(priv->regmap, MAX96717_VTX_VS_HIGH, v_sw * h_tot, &ret); in max96717_apply_patgen_timing()
199 cci_write(priv->regmap, MAX96717_VTX_VS_LOW, in max96717_apply_patgen_timing()
201 cci_write(priv->regmap, MAX96717_VTX_HS_HIGH, h_sw, &ret); in max96717_apply_patgen_timing()
202 cci_write(priv->regmap, MAX96717_VTX_HS_LOW, h_active + h_fp + h_bp, in max96717_apply_patgen_timing()
204 cci_write(priv->regmap, MAX96717_VTX_V2D, in max96717_apply_patgen_timing()
206 cci_write(priv->regmap, MAX96717_VTX_HS_CNT, v_tot, &ret); in max96717_apply_patgen_timing()
207 cci_write(priv->regmap, MAX96717_VTX_DE_HIGH, h_active, &ret); in max96717_apply_patgen_timing()
208 cci_write(priv->regmap, MAX96717_VTX_DE_LOW, h_fp + h_sw + h_bp, in max96717_apply_patgen_timing()
210 cci_write(priv->regmap, MAX96717_VTX_DE_CNT, v_active, &ret); in max96717_apply_patgen_timing()
[all …]
H A Dgc0310.c298 cci_write(sensor->regmap, GC0310_AGC_ADJ_REG, again, &ret); in gc0310_gain_set()
299 cci_write(sensor->regmap, GC0310_DGC_ADJ_REG, dgain, &ret); in gc0310_gain_set()
330 ret = cci_write(sensor->regmap, GC0310_AEC_PK_EXPO_REG, in gc0310_s_ctrl()
337 ret = cci_write(sensor->regmap, GC0310_V_BLANKING_REG, in gc0310_s_ctrl()
466 cci_write(sensor->regmap, GC0310_RESET_RELATED_REG, 0x30, &ret); in gc0310_enable_streams()
468 cci_write(sensor->regmap, GC0310_RESET_RELATED_REG, in gc0310_enable_streams()
470 cci_write(sensor->regmap, GC0310_SW_STREAM_REG, in gc0310_enable_streams()
472 cci_write(sensor->regmap, GC0310_RESET_RELATED_REG, in gc0310_enable_streams()
490 cci_write(sensor->regmap, GC0310_RESET_RELATED_REG, in gc0310_disable_streams()
492 cci_write(sensor->regmap, GC0310_SW_STREAM_REG, in gc0310_disable_streams()
[all …]
H A Dthp7312.c401 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_RD, in thp7312_set_mipi_lanes()
403 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_TD, in thp7312_set_mipi_lanes()
405 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_SET, 1, &ret); in thp7312_set_mipi_lanes()
435 cci_write(thp7312->regmap, THP7312_REG_VIDEO_IMAGE_SIZE, in thp7312_change_mode()
437 cci_write(thp7312->regmap, THP7312_REG_VIDEO_FRAME_RATE_MODE, in thp7312_change_mode()
439 cci_write(thp7312->regmap, THP7312_REG_JPEG_COMPRESSION_FACTOR, 0x5e, in thp7312_change_mode()
441 cci_write(thp7312->regmap, THP7312_REG_SET_DRIVING_MODE, 0x01, &ret); in thp7312_change_mode()
475 return cci_write(thp7312->regmap, in thp7312_set_framefmt()
510 return cci_write(thp7312->regmap, THP7312_REG_SET_OUTPUT_ENABLE, in thp7312_stream_enable()
936 ret = cci_write(thp7312->regmap, in thp7312_set_focus()
[all …]
H A Dov5693.c409 cci_write(ov5693->regmap, OV5693_EXPOSURE_CTRL_REG, exposure, &ret); in ov5693_exposure_configure()
436 cci_write(ov5693->regmap, OV5693_MWB_RED_GAIN_REG, gain, &ret); in ov5693_digital_gain_configure()
437 cci_write(ov5693->regmap, OV5693_MWB_GREEN_GAIN_REG, gain, &ret); in ov5693_digital_gain_configure()
438 cci_write(ov5693->regmap, OV5693_MWB_BLUE_GAIN_REG, gain, &ret); in ov5693_digital_gain_configure()
449 cci_write(ov5693->regmap, OV5693_GAIN_CTRL_REG, gain, &ret); in ov5693_analog_gain_configure()
459 cci_write(ov5693->regmap, OV5693_TIMING_VTS_REG, vts, &ret); in ov5693_vts_configure()
468 cci_write(ov5693->regmap, OV5693_TEST_PATTERN_REG, in ov5693_test_pattern_configure()
558 cci_write(ov5693->regmap, OV5693_CROP_START_X_REG, mode->crop.left, in ov5693_mode_configure()
562 cci_write(ov5693->regmap, OV5693_OFFSET_START_X_REG, 0, &ret); in ov5693_mode_configure()
565 cci_write(ov5693->regmap, OV5693_OUTPUT_SIZE_X_REG, mode->format.width, in ov5693_mode_configure()
[all …]
H A Dimx334.c557 cci_write(imx334->cci, IMX334_REG_HOLD, 1, &ret); in imx334_update_exp_gain()
558 cci_write(imx334->cci, IMX334_REG_VMAX, lpfr, &ret); in imx334_update_exp_gain()
559 cci_write(imx334->cci, IMX334_REG_SHUTTER, shutter, &ret); in imx334_update_exp_gain()
560 cci_write(imx334->cci, IMX334_REG_AGAIN, gain, &ret); in imx334_update_exp_gain()
562 ret_hold = cci_write(imx334->cci, IMX334_REG_HOLD, 0, NULL); in imx334_update_exp_gain()
636 cci_write(imx334->cci, IMX334_TP_CLK_EN, in imx334_set_ctrl()
638 cci_write(imx334->cci, IMX334_DIG_CLP_MODE, 0x0, NULL); in imx334_set_ctrl()
639 cci_write(imx334->cci, IMX334_TPG_COLORW, in imx334_set_ctrl()
641 cci_write(imx334->cci, IMX334_REG_TP, in imx334_set_ctrl()
643 cci_write(imx334->cci, IMX334_TPG_EN_DOUT, in imx334_set_ctrl()
[all …]
H A Dimx111.c746 cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_GREENR, val, &ret); in imx111_update_digital_gain()
747 cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_RED, val, &ret); in imx111_update_digital_gain()
748 cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_BLUE, val, &ret); in imx111_update_digital_gain()
749 cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_GREENB, val, &ret); in imx111_update_digital_gain()
784 cci_write(sensor->regmap, IMX111_REG_ANALOG_GAIN, ctrl->val, in imx111_set_ctrl()
794 cci_write(sensor->regmap, IMX111_INTEGRATION_TIME, ctrl->val, in imx111_set_ctrl()
803 cci_write(sensor->regmap, IMX111_HORIZONTAL_TOTAL_LENGTH, in imx111_set_ctrl()
812 cci_write(sensor->regmap, IMX111_VERTICAL_TOTAL_LENGTH, in imx111_set_ctrl()
819 cci_write(sensor->regmap, IMX111_IMAGE_ORIENTATION, in imx111_set_ctrl()
823 cci_write(sensor->regmap, IMX111_TEST_PATTERN, ctrl->val, in imx111_set_ctrl()
[all …]
H A Dimx335.c634 cci_write(imx335->cci, IMX335_REG_HOLD, 1, &ret); in imx335_update_exp_gain()
635 cci_write(imx335->cci, IMX335_REG_VMAX, lpfr, &ret); in imx335_update_exp_gain()
636 cci_write(imx335->cci, IMX335_REG_SHUTTER, shutter, &ret); in imx335_update_exp_gain()
637 cci_write(imx335->cci, IMX335_REG_GAIN, gain, &ret); in imx335_update_exp_gain()
642 ret_hold = cci_write(imx335->cci, IMX335_REG_HOLD, 0, NULL); in imx335_update_exp_gain()
659 return cci_write(imx335->cci, IMX335_REG_VREVERSE, vflip, &ret); in imx335_update_vertical_flip()
679 cci_write(imx335->cci, IMX335_REG_TPG, in imx335_update_test_pattern()
996 cci_write(imx335->cci, IMX335_REG_MDBIT, bpp == 12, &ret); in imx335_set_framefmt()
1004 cci_write(imx335->cci, IMX335_REG_ADBIT, 0x00, &ret); in imx335_set_framefmt()
1005 cci_write(imx335->cci, IMX335_REG_ADBIT1, 0x1ff, &ret); in imx335_set_framefmt()
[all …]
H A Dimx258.c732 cci_write(imx258->regmap, IMX258_REG_GR_DIGITAL_GAIN, val, &ret); in imx258_update_digital_gain()
733 cci_write(imx258->regmap, IMX258_REG_GB_DIGITAL_GAIN, val, &ret); in imx258_update_digital_gain()
734 cci_write(imx258->regmap, IMX258_REG_R_DIGITAL_GAIN, val, &ret); in imx258_update_digital_gain()
735 cci_write(imx258->regmap, IMX258_REG_B_DIGITAL_GAIN, val, &ret); in imx258_update_digital_gain()
775 ret = cci_write(imx258->regmap, IMX258_REG_ANALOG_GAIN, in imx258_set_ctrl()
779 ret = cci_write(imx258->regmap, IMX258_REG_EXPOSURE, in imx258_set_ctrl()
786 ret = cci_write(imx258->regmap, IMX258_REG_TEST_PATTERN, in imx258_set_ctrl()
791 ret = cci_write(imx258->regmap, IMX258_REG_HDR, in imx258_set_ctrl()
794 ret = cci_write(imx258->regmap, IMX258_REG_HDR, in imx258_set_ctrl()
798 ret = cci_write(imx258->regmap, IMX258_REG_HDR_RATIO, in imx258_set_ctrl()
[all …]
H A Dgc2145.c861 cci_write(gc2145->regmap, GC2145_REG_LWC, lwc, &ret); in gc2145_config_mipi_mode()
878 cci_write(gc2145->regmap, GC2145_REG_FIFO_FULL_LVL, in gc2145_config_mipi_mode()
885 cci_write(gc2145->regmap, GC2145_REG_FIFO_GATE_MODE, in gc2145_config_mipi_mode()
890 cci_write(gc2145->regmap, GC2145_REG_MIPI_DT, in gc2145_config_mipi_mode()
894 cci_write(gc2145->regmap, GC2145_REG_BUF_CSI2_MODE, in gc2145_config_mipi_mode()
929 cci_write(gc2145->regmap, GC2145_REG_PAGE_SELECT, 0x00, &ret); in gc2145_enable_streams()
931 cci_write(gc2145->regmap, GC2145_REG_OUTPUT_FMT, in gc2145_enable_streams()
961 cci_write(gc2145->regmap, GC2145_REG_PAGE_SELECT, 0x00, &ret); in gc2145_enable_streams()
979 cci_write(gc2145->regmap, GC2145_REG_PAGE_SELECT, 0x03, &ret); in gc2145_disable_streams()
983 cci_write(gc2145->regmap, GC2145_REG_PAGE_SELECT, 0x00, &ret); in gc2145_disable_streams()
[all …]
H A Dov02c10.c438 cci_write(ov02c10->regmap, OV02C10_REG_ANALOG_GAIN, in ov02c10_set_ctrl()
443 cci_write(ov02c10->regmap, OV02C10_REG_DIGITAL_GAIN, in ov02c10_set_ctrl()
448 cci_write(ov02c10->regmap, OV02C10_REG_EXPOSURE, in ov02c10_set_ctrl()
453 cci_write(ov02c10->regmap, OV02C10_REG_VTS, height + ctrl->val, in ov02c10_set_ctrl()
462 cci_write(ov02c10->regmap, OV02C10_ISP_X_WIN_CONTROL, in ov02c10_set_ctrl()
469 cci_write(ov02c10->regmap, OV02C10_ISP_Y_WIN_CONTROL, in ov02c10_set_ctrl()
619 ret = cci_write(ov02c10->regmap, OV02C10_REG_STREAM_CONTROL, 1, NULL); in ov02c10_enable_streams()
633 cci_write(ov02c10->regmap, OV02C10_REG_STREAM_CONTROL, 0, NULL); in ov02c10_disable_streams()
H A Dgc05a2.c867 ret = cci_write(gc05a2->regmap, GC05A2_REG_TEST_PATTERN_IDX, in gc05a2_test_pattern()
872 return cci_write(gc05a2->regmap, GC05A2_REG_TEST_PATTERN_EN, in gc05a2_test_pattern()
875 return cci_write(gc05a2->regmap, GC05A2_REG_TEST_PATTERN_EN, in gc05a2_test_pattern()
910 ret = cci_write(gc05a2->regmap, GC05A2_EXP_REG, in gc05a2_set_ctrl()
915 ret = cci_write(gc05a2->regmap, GC05A2_AGAIN_REG, in gc05a2_set_ctrl()
920 ret = cci_write(gc05a2->regmap, GC05A2_FRAME_LENGTH_REG, in gc05a2_set_ctrl()
1006 ret = cci_write(gc05a2->regmap, GC05A2_STREAMING_REG, 1, NULL); in gc05a2_start_streaming()
1023 ret = cci_write(gc05a2->regmap, GC05A2_STREAMING_REG, 0, NULL); in gc05a2_stop_streaming()
H A Dgc08a3.c837 ret = cci_write(gc08a3->regmap, GC08A3_REG_TEST_PATTERN_IDX, in gc08a3_test_pattern()
842 return cci_write(gc08a3->regmap, GC08A3_REG_TEST_PATTERN_EN, in gc08a3_test_pattern()
845 return cci_write(gc08a3->regmap, GC08A3_REG_TEST_PATTERN_EN, in gc08a3_test_pattern()
880 ret = cci_write(gc08a3->regmap, GC08A3_EXP_REG, in gc08a3_set_ctrl()
885 ret = cci_write(gc08a3->regmap, GC08A3_AGAIN_REG, in gc08a3_set_ctrl()
890 ret = cci_write(gc08a3->regmap, GC08A3_FRAME_LENGTH_REG, in gc08a3_set_ctrl()
948 ret = cci_write(gc08a3->regmap, GC08A3_STREAMING_REG, 1, NULL); in gc08a3_start_streaming()
965 ret = cci_write(gc08a3->regmap, GC08A3_STREAMING_REG, 0, NULL); in gc08a3_stop_streaming()
/linux/drivers/media/v4l2-core/
H A Dv4l2-cci.c92 int cci_write(struct regmap *map, u32 reg, u64 val, int *err) in cci_write() function
152 EXPORT_SYMBOL_GPL(cci_write);
165 return cci_write(map, reg, val, err); in cci_update_bits()
176 ret = cci_write(map, regs[i].reg, regs[i].val, err); in cci_multi_reg_write()

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