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Searched refs:c12 (Results 1 – 17 of 17) sorted by relevance

/linux/arch/arm/include/asm/
H A Darch_gicv3.h18 #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1)
19 #define ICC_DIR __ACCESS_CP15(c12, 0, c11, 1)
20 #define ICC_IAR1 __ACCESS_CP15(c12, 0, c12, 0)
21 #define ICC_SGI1R __ACCESS_CP15_64(0, c12)
23 #define ICC_CTLR __ACCESS_CP15(c12, 0, c12, 4)
24 #define ICC_SRE __ACCESS_CP15(c12, 0, c12, 5)
25 #define ICC_IGRPEN1 __ACCESS_CP15(c12, 0, c12, 7)
26 #define ICC_BPR1 __ACCESS_CP15(c12, 0, c12, 3)
27 #define ICC_RPR __ACCESS_CP15(c12, 0, c11, 3)
29 #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x)
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H A Darm_pmuv3.h14 #define PMCR __ACCESS_CP15(c9, 0, c12, 0)
15 #define PMCNTENSET __ACCESS_CP15(c9, 0, c12, 1)
16 #define PMCNTENCLR __ACCESS_CP15(c9, 0, c12, 2)
17 #define PMOVSR __ACCESS_CP15(c9, 0, c12, 3)
18 #define PMSELR __ACCESS_CP15(c9, 0, c12, 5)
19 #define PMCEID0 __ACCESS_CP15(c9, 0, c12, 6)
20 #define PMCEID1 __ACCESS_CP15(c9, 0, c12, 7)
63 #define PMEVTYPER0 __ACCESS_CP15(c14, 0, c12, 0)
64 #define PMEVTYPER1 __ACCESS_CP15(c14, 0, c12, 1)
65 #define PMEVTYPER2 __ACCESS_CP15(c14, 0, c12, 2)
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/linux/arch/arm/include/asm/hardware/
H A Dcp14.h69 #define RCP14_DBGBVR12() MRC14(0, c0, c12, 4)
85 #define RCP14_DBGBCR12() MRC14(0, c0, c12, 5)
101 #define RCP14_DBGWVR12() MRC14(0, c0, c12, 6)
117 #define RCP14_DBGWCR12() MRC14(0, c0, c12, 7)
134 #define RCP14_DBGBXVR12() MRC14(0, c1, c12, 1)
174 #define WCP14_DBGBVR12(val) MCR14(val, 0, c0, c12, 4)
190 #define WCP14_DBGBCR12(val) MCR14(val, 0, c0, c12, 5)
206 #define WCP14_DBGWVR12(val) MCR14(val, 0, c0, c12, 6)
222 #define WCP14_DBGWCR12(val) MCR14(val, 0, c0, c12, 7)
238 #define WCP14_DBGBXVR12(val) MCR14(val, 0, c1, c12, 1)
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/linux/drivers/iio/pressure/
H A Dmpl115.c30 s16 c12; member
70 a1 = data->b1 + ((data->c12 * tadc) >> 11); in mpl115_comp_pressure()
196 data->c12 = ret; in mpl115_probe()
/linux/tools/testing/selftests/cgroup/
H A Dtest_cpuset_prs.sh115 rmdir rtest/p1/c11 rtest/p1/c12 rtest/p2/c21 \
669 [[ $CGRP_DIR = c12 ]] && CGRP_DIR=p1/c12
1051 set_ctrl_state_noerr p1/c12 $OLD_c12
1059 set_ctrl_state p1/c12 $NEW_c12; ((RETVAL += $?))
/linux/tools/perf/arch/s390/include/
H A Ddwarf-regs-table.h42 REG_DWARFNUM_NAME(c12, 44),
/linux/arch/arm/kernel/
H A Dhyp-stub.S116 mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR)
/linux/drivers/gpu/drm/tidss/
H A Dtidss_dispc.c1244 u16 c12; in c8_to_c12() local
1246 c12 = c8 << 4; in c8_to_c12()
1251 c12 |= c8 >> 4; in c8_to_c12()
1254 c12 |= 0xF; in c8_to_c12()
1261 return c12; in c8_to_c12()
1786 u32 c12; in dispc_vid_write_fir_coefs() local
1790 c12 = FIELD_PREP(GENMASK(19, 10), c1) | FIELD_PREP(GENMASK(29, 20), in dispc_vid_write_fir_coefs()
1793 dispc_vid_write(dispc, hw_plane, reg, c12); in dispc_vid_write_fir_coefs()
/linux/drivers/staging/media/ipu3/include/uapi/
H A Dintel-ipu3.h1626 __u32 c12:9; member
1876 __u32 c12:2; member
/linux/arch/arm/mach-omap2/
H A Dsram243x.S235 mcrr p15, 1, r8, r4, c12 @ preload into icache
H A Dsram242x.S235 mcrr p15, 1, r8, r4, c12 @ preload into icache
/linux/arch/arm64/include/asm/
H A Dassembler.h395 sys 3, c7, c12, 1, \start // dc cvap
/linux/lib/crypto/powerpc/
H A Dchacha-p10le-8x.S30 # a12 b12 c12 d12
/linux/Documentation/input/devices/
H A Dxpad.rst153 P: Vendor=0c12 ProdID=8809 Rev= 0.01
/linux/drivers/gpu/drm/vc4/
H A Dvc4_hvs.c369 c9, c10, c11, c12, c13, c14, c15) \ argument
374 VC4_PPF_FILTER_WORD(c12, c13, c14), \
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ibm-everest.dts366 "presence-vrm-c12",
H A Daspeed-bmc-ibm-fuji.dts368 "presence-vrm-c12",