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Searched refs:bridges (Results 1 – 25 of 89) sorted by relevance

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/linux/drivers/pcmcia/
H A DKconfig63 bridge. Virtually all modern PCMCIA bridges do this, and most of
71 comment "PC-card bridges"
79 This option enables support for CardBus host bridges. Virtually
80 all modern PCMCIA bridges are CardBus compatible. A "bridge" is
91 bool "Special initialization for O2Micro bridges" if EXPERT
96 bool "Special initialization for Ricoh bridges" if EXPERT
101 bool "Special initialization for TI and EnE bridges" if EXPERT
106 bool "Auto-tune EnE bridges for CB cards" if EXPERT
111 bool "Special initialization for Toshiba ToPIC bridges" if EXPERT
136 Say Y here to include support for ISA-bus PCMCIA host bridges that
[all …]
/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c172 struct tegra194_axi2apb_bridge *bridges; member
1893 status = tegra194_axi2apb_status(cbb->bridges[i].base); in print_errlog0()
2200 if (priv->bridges) { in tegra194_cbb_get_bridges()
2202 cbb->bridges = priv->bridges; in tegra194_cbb_get_bridges()
2209 if (!cbb->bridges) { in tegra194_cbb_get_bridges()
2212 cbb->bridges = devm_kcalloc(cbb->base.dev, cbb->num_bridges, in tegra194_cbb_get_bridges()
2213 sizeof(*cbb->bridges), GFP_KERNEL); in tegra194_cbb_get_bridges()
2214 if (!cbb->bridges) in tegra194_cbb_get_bridges()
2218 err = of_address_to_resource(np, i, &cbb->bridges[i].res); in tegra194_cbb_get_bridges()
2222 cbb->bridges[i].base = devm_ioremap_resource(cbb->base.dev, in tegra194_cbb_get_bridges()
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/linux/drivers/ata/
H A Dpata_ftide010.c274 int bridges = 0; in pata_ftide010_gemini_port_start() local
285 bridges++; in pata_ftide010_gemini_port_start()
291 bridges++; in pata_ftide010_gemini_port_start()
298 bridges++; in pata_ftide010_gemini_port_start()
305 bridges++; in pata_ftide010_gemini_port_start()
308 dev_info(dev, "brought %d bridges online\n", bridges); in pata_ftide010_gemini_port_start()
309 return (bridges > 0) ? 0 : -EINVAL; // -ENODEV; in pata_ftide010_gemini_port_start()
/linux/Documentation/driver-api/fpga/
H A Dfpga-region.rst12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
26 * which bridges to disable before programming and enable afterwards.
68 The FPGA region will need to specify which bridges to control while programming
69 the FPGA. The region driver can build a list of bridges during probe time
71 the list of bridges to program just before programming
79 * fpga_bridges_put() - Given a list of bridges, put them
H A Dfpga-programming.rst12 the FPGA manager and bridges. It will:
16 * build a list of FPGA bridges if a method has been specified to do so
17 * disable the bridges
19 * re-enable the bridges
31 bridges to control during programming or it has a pointer to a function that
/linux/Documentation/driver-api/cxl/platform/acpi/
H A Dcedt.rst12 The CXL Host Bridge Structure describes CXL host bridges. Other than describing
30 with one or more CXL host bridges (as described by the CHBS). It additionally
H A Ddsdt.rst9 This table's UIDs for CXL devices - specifically host bridges, must be
/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dhb-interleave.rst6 This system has a single socket with two CXL host bridges. Each host bridge
13 * This SRAT describes one node for both host bridges.
/linux/Documentation/ABI/testing/
H A Dsysfs-devices-pci-host-bridge6 controllers may also parent host bridges. The DDDD:BB format
10 for emulated host-bridges.
/linux/Documentation/i2c/busses/
H A Di2c-sis96x.rst11 Any combination of these host bridges:
14 and these south bridges:
H A Di2c-ali1563.rst24 the i2c controller found in the Intel 801 south bridges.
H A Di2c-ali1535.rst25 M15x3 South bridges also produced by Acer Labs Inc. Some of the registers
H A Di2c-viapro.rst47 supported VIA south bridges.
/linux/net/bridge/
H A DKconfig15 Several such bridges can work together to create even larger
17 As this is a standard, Linux bridges will cooperate properly with
/linux/Documentation/PCI/
H A Dmsi-howto.rst50 bridges). In order to ensure that all the data has arrived in memory,
239 Some PCI bridges are not able to route MSIs between buses properly.
242 Some bridges allow you to enable MSIs by changing some bits in their
259 Again, please notify linux-pci@vger.kernel.org of any bridges that need
280 Then, 'lspci -t' gives the list of bridges above a device. Reading
283 to bridges between the PCI root and the device, MSIs are disabled.
H A Dacpi-info.rst4 ACPI considerations for PCI host bridges
11 host bridges, so the ACPI namespace must describe each host bridge, the
44 PCI host bridges are PNP0A03 or PNP0A08 devices. Their _CRS should
93 bridges [8]. Since MCFG is a static table and can't be updated by hotplug,
/linux/Documentation/networking/
H A Dbridge.rst11 operation of bridges in computer networks. A bridge, in the context of this
101 different bridges.
102 3. Bridge Election: When the network starts, all bridges initially assume
111 BPDUs with information about the root bridge to all other bridges in the
112 network. This information is used by other bridges to calculate the
119 all in the forwarding state. while other bridges have some ports in the
/linux/Documentation/driver-api/cxl/linux/example-configurations/
H A Dhb-interleave.rst11 * The CXL root is configured to interleave across the two host bridges.
212 The next chunk shows the two CXL host bridges without attached endpoints.
H A Dmulti-interleave.rst11 * The CXL root is configured to interleave across the two host bridges.
288 The next chunk shows the two CXL host bridges without attached endpoints.
/linux/Documentation/driver-api/cxl/linux/
H A Dcxl-driver.rst27 Here is an example from a single-socket system with 4 host bridges. Two host
28 bridges have a single memory device attached, and the devices are interleaved
186 In our example described above, there are four host bridges attached to the
187 root, and two of the host bridges have one endpoint attached.
325 host bridges).
379 accesses over two host bridges. Each host bridge has a decoder which routes
504 attached to 4 host bridges, linux expects the following ways/granularity
/linux/drivers/fpga/
H A DKconfig109 Say Y here if you want to support bridges connected between host
116 Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
123 Say Y to enable drivers for Altera FPGA Freeze bridges. A
/linux/Documentation/gpu/
H A Dvgaarbiter.rst132 forwarding on P2P bridges if necessary, so that the requested resources can
135 P2P bridges if any). In the case of vga_arb_lock(), the function will block
137 any resource on a different bus segment, since P2P bridges don't differentiate
/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/
H A Dbridge.h19 struct list_head bridges; member
H A Dbridge.c869 list_add(&bridge->list, &br_offloads->bridges); in mlx5_esw_bridge_create()
902 if (list_empty(&br_offloads->bridges)) in mlx5_esw_bridge_put()
913 list_for_each_entry(bridge, &br_offloads->bridges, list) { in mlx5_esw_bridge_lookup()
928 if (IS_ERR(bridge) && list_empty(&br_offloads->bridges)) in mlx5_esw_bridge_lookup()
1833 list_for_each_entry(bridge, &br_offloads->bridges, list) { in mlx5_esw_bridge_update()
1917 WARN_ONCE(!list_empty(&br_offloads->bridges), in mlx5_esw_bridge_flush()
1931 INIT_LIST_HEAD(&br_offloads->bridges); in mlx5_esw_bridge_init()
/linux/Documentation/networking/dsa/
H A Db53.rst88 # add ports to bridges
168 # add ports to bridges

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