Searched refs:bankh (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/radeon/ |
| H A D | evergreen_cs.c | 179 unsigned bankh; member 271 halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; in evergreen_surface_check_2d() 359 switch (surf->bankh) { in evergreen_surface_value_conv_check() 360 case 0: surf->bankh = 1; break; in evergreen_surface_value_conv_check() 361 case 1: surf->bankh = 2; break; in evergreen_surface_value_conv_check() 362 case 2: surf->bankh = 4; break; in evergreen_surface_value_conv_check() 363 case 3: surf->bankh = 8; break; in evergreen_surface_value_conv_check() 366 __func__, __LINE__, prefix, surf->bankh); in evergreen_surface_value_conv_check() 413 surf.bankh = G_028C74_BANK_HEIGHT(track->cb_color_attrib[id]); in evergreen_cs_track_validate_cb() 488 surf.bankw, surf.bankh, in evergreen_cs_track_validate_cb() [all …]
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| H A D | radeon_object.c | 611 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; in radeon_bo_set_tiling_flags() local 614 bankh = (tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in radeon_bo_set_tiling_flags() 628 switch (bankh) { in radeon_bo_set_tiling_flags()
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| H A D | radeon.h | 357 unsigned *bankh, unsigned *mtaspect,
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 186 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags() local 189 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags() 201 tiling_info->gfx8.bank_height = bankh; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | dce_v8_0.c | 1915 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local 1918 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v8_0_crtc_do_set_base() 1927 fb_format |= (bankh << GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT); in dce_v8_0_crtc_do_set_base()
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| H A D | dce_v6_0.c | 2003 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local 2006 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v6_0_crtc_do_set_base() 2015 fb_format |= (bankh << GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT); in dce_v6_0_crtc_do_set_base()
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| H A D | dce_v10_0.c | 1976 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local 1979 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v10_0_crtc_do_set_base() 1990 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_HEIGHT, bankh); in dce_v10_0_crtc_do_set_base()
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