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Searched refs:asic_id (Results 1 – 25 of 49) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/ !
H A Dclk_mgr.c149 struct hw_asic_id asic_id = ctx->asic_id; in dc_clk_mgr_create() local
151 switch (asic_id.chip_family) { in dc_clk_mgr_create()
192 if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || in dc_clk_mgr_create()
193 ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
197 if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) || in dc_clk_mgr_create()
198 ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) || in dc_clk_mgr_create()
199 ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
203 if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
216 if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev)) in dc_clk_mgr_create()
231 if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) { in dc_clk_mgr_create()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn10/ !
H A Ddcn10_fpu.c140 if (ASICREV_IS_RV1_F0(dc->ctx->asic_id.hw_internal_rev)) { in dcn10_resource_construct_fp()
146 dc->dcn_soc->number_of_channels = dc->ctx->asic_id.vram_width / ddr4_dram_width; in dcn10_resource_construct_fp()
156 if (ASICREV_IS_RV1_F0(dc->ctx->asic_id.hw_internal_rev)) in dcn10_resource_construct_fp()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ !
H A Ddce112_clk_mgr.c104 if (!((clk_mgr_base->ctx->asic_id.chip_family == FAMILY_AI) && in dce112_set_clock()
105 ASICREV_IS_VEGA20_P(clk_mgr_base->ctx->asic_id.hw_internal_rev))) in dce112_set_clock()
177 if (!((clk_mgr->base.ctx->asic_id.chip_family == FAMILY_AI) && in dce112_set_dprefclk()
178 ASICREV_IS_VEGA20_P(clk_mgr->base.ctx->asic_id.hw_internal_rev))) in dce112_set_dprefclk()
/linux/drivers/gpu/drm/amd/display/dc/core/ !
H A Ddc_resource.c136 enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) in resource_parse_asic_id() argument
140 switch (asic_id.chip_family) { in resource_parse_asic_id()
144 if (ASIC_REV_IS_TAHITI_P(asic_id.hw_internal_rev) || in resource_parse_asic_id()
145 ASIC_REV_IS_PITCAIRN_PM(asic_id.hw_internal_rev) || in resource_parse_asic_id()
146 ASIC_REV_IS_CAPEVERDE_M(asic_id.hw_internal_rev)) in resource_parse_asic_id()
148 else if (ASIC_REV_IS_OLAND_M(asic_id.hw_internal_rev)) in resource_parse_asic_id()
158 if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev) || in resource_parse_asic_id()
159 ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev) || in resource_parse_asic_id()
160 ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev)) in resource_parse_asic_id()
170 if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) || in resource_parse_asic_id()
[all …]
/linux/drivers/infiniband/hw/ocrdma/ !
H A Docrdma.h290 u32 asic_id; member
566 if (dev->nic_info.dev_family == 0xF && !dev->asic_id) { in ocrdma_get_asic_type()
569 OCRDMA_SLI_ASIC_ID_OFFSET, &dev->asic_id); in ocrdma_get_asic_type()
572 return (dev->asic_id & OCRDMA_SLI_ASIC_GEN_NUM_MASK) >> in ocrdma_get_asic_type()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ !
H A Ddcn32_clk_mgr_smu_msg.c196 if (ASICREV_IS_GC_11_0_0(clk_mgr->base.ctx->asic_id.hw_internal_rev)) { in dcn32_get_hard_min_status_supported()
199 } else if (ASICREV_IS_GC_11_0_2(clk_mgr->base.ctx->asic_id.hw_internal_rev)) { in dcn32_get_hard_min_status_supported()
H A Ddcn32_clk_mgr.c854 if (ASICREV_IS_GC_11_0_2(clk_mgr->base.ctx->asic_id.hw_internal_rev)) in dcn32_get_vco_frequency_from_reg()
883 if (ASICREV_IS_GC_11_0_2(clk_mgr->base.ctx->asic_id.hw_internal_rev)) { in dcn32_dump_clk_registers()
1154 if (ASICREV_IS_GC_11_0_2(clk_mgr->base.ctx->asic_id.hw_internal_rev)) { in dcn32_clk_mgr_construct()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce110/ !
H A Ddce110_resource.h46 struct hw_asic_id asic_id);
H A Ddce110_resource.c570 hws->regs = ASIC_REV_IS_STONEY(ctx->asic_id.hw_internal_rev) ? in dce110_hwseq_create()
1343 struct hw_asic_id *asic_id) in dce110_resource_cap() argument
1345 if (ASIC_REV_IS_STONEY(asic_id->hw_internal_rev)) in dce110_resource_cap()
1355 struct hw_asic_id asic_id) in dce110_resource_construct() argument
1363 pool->base.res_cap = dce110_resource_cap(&ctx->asic_id); in dce110_resource_construct()
1527 bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); in dce110_resource_construct()
1541 struct hw_asic_id asic_id) in dce110_create_resource_pool() argument
1549 if (dce110_resource_construct(num_virtual_links, dc, pool, asic_id)) in dce110_create_resource_pool()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ !
H A Ddce110_clk_mgr.c221 if (dc->bw_vbios && (dc->ctx->asic_id.chip_family == FAMILY_AI) && in dce11_pplib_apply_display_requirements()
222 ASICREV_IS_VEGA20_P(dc->ctx->asic_id.hw_internal_rev) && (context->stream_count >= 2)) { in dce11_pplib_apply_display_requirements()
/linux/drivers/tty/serial/ !
H A Drp2.c461 static int rp2_asic_interrupt(struct rp2_card *card, unsigned int asic_id) in rp2_asic_interrupt() argument
463 void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); in rp2_asic_interrupt()
574 static void rp2_reset_asic(struct rp2_card *card, unsigned int asic_id) in rp2_reset_asic() argument
576 void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); in rp2_reset_asic()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce112/ !
H A Ddce112_resource.c1218 struct hw_asic_id *asic_id) in dce112_resource_cap() argument
1220 if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev) || in dce112_resource_cap()
1221 ASIC_REV_IS_POLARIS12_V(asic_id->hw_internal_rev)) in dce112_resource_cap()
1237 pool->base.res_cap = dce112_resource_cap(&ctx->asic_id); in dce112_resource_construct()
1410 bw_calcs_init(dc->bw_dceip, dc->bw_vbios, dc->ctx->asic_id); in dce112_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ !
H A Ddce60_clk_mgr.c89 if (ASIC_REV_IS_TAHITI_P(ctx->asic_id.hw_internal_rev)) in dce60_get_dp_ref_freq_khz()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn35/ !
H A Ddcn35_dpp.c142 if (dpp->base.ctx->asic_id.hw_internal_rev < 0x40) in dpp35_construct()
/linux/drivers/scsi/qla4xxx/ !
H A Dql4_nvram.h107 u8 asic_id[4]; /* x00 */ member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/ !
H A Ddcn10_resource.c887 if ((ctx->asic_id.chip_family == FAMILY_RV) && in dcn10_hwseq_create()
888 ASICREV_IS_RAVEN2(ctx->asic_id.hw_internal_rev)) in dcn10_hwseq_create()
889 switch (ctx->asic_id.pci_revision_id) { in dcn10_hwseq_create()
1510 if (ASICREV_IS_RAVEN2(dc->ctx->asic_id.hw_internal_rev)) in dcn10_resource_construct()
1511 switch (dc->ctx->asic_id.pci_revision_id) { in dcn10_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn32/ !
H A Ddcn32_hubbub.c770 (ASICREV_IS_GC_11_0_0(dc->ctx->asic_id.hw_internal_rev) || in hubbub32_program_watermarks()
771 ASICREV_IS_GC_11_0_3(dc->ctx->asic_id.hw_internal_rev))) { in hubbub32_program_watermarks()
813 (ASICREV_IS_GC_11_0_0(dc->ctx->asic_id.hw_internal_rev) || in hubbub32_program_watermarks()
814 ASICREV_IS_GC_11_0_3(dc->ctx->asic_id.hw_internal_rev))) { in hubbub32_program_watermarks()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ !
H A Ddcn20_resource.c1035 if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { in dcn20_stream_encoder_create()
2374 get_asic_rev_soc_bb(dc->ctx->asic_id.hw_internal_rev); in init_soc_bounding_box()
2376 get_asic_rev_ip_params(dc->ctx->asic_id.hw_internal_rev); in init_soc_bounding_box()
2434 get_asic_rev_soc_bb(ctx->asic_id.hw_internal_rev); in dcn20_resource_construct()
2436 get_asic_rev_ip_params(ctx->asic_id.hw_internal_rev); in dcn20_resource_construct()
2438 get_dml_project_version(ctx->asic_id.hw_internal_rev); in dcn20_resource_construct()
2443 if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { in dcn20_resource_construct()
2769 if (ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) { in dcn20_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/basics/ !
H A Ddce_calcs.c47 static enum bw_calcs_version bw_calcs_version_from_asic_id(struct hw_asic_id asic_id) in bw_calcs_version_from_asic_id() argument
49 switch (asic_id.chip_family) { in bw_calcs_version_from_asic_id()
52 if (ASIC_REV_IS_STONEY(asic_id.hw_internal_rev)) in bw_calcs_version_from_asic_id()
57 if (ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) in bw_calcs_version_from_asic_id()
59 if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev)) in bw_calcs_version_from_asic_id()
61 if (ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)) in bw_calcs_version_from_asic_id()
63 if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) in bw_calcs_version_from_asic_id()
2045 struct hw_asic_id asic_id) in bw_calcs_init() argument
2050 enum bw_calcs_version version = bw_calcs_version_from_asic_id(asic_id); in bw_calcs_init()
2068 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; in bw_calcs_init()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/ !
H A Dresource.h43 struct hw_asic_id asic_id);
H A Ddce_calcs.h472 struct hw_asic_id asic_id);
/linux/drivers/gpu/drm/amd/display/dc/dce/ !
H A Ddce_clk_mgr.c321 if (!((clk_mgr->ctx->asic_id.chip_family == FAMILY_AI) && in dce112_set_clock()
322 ASICREV_IS_VEGA20_P(clk_mgr->ctx->asic_id.hw_internal_rev))) in dce112_set_clock()
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ !
H A Ddcn31_dccg.c88 if (dccg_dcn->base.ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && in get_phy_mux_symclk()
89 dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { in get_phy_mux_symclk()
/linux/drivers/gpu/drm/amd/display/dc/dce110/ !
H A Ddce110_compressor.c444 compressor->base.memory_bus_width = ctx->asic_id.vram_width; in dce110_compressor_construct()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ !
H A Ddcn31_resource.c2035 if (dc->ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { in dcn31_resource_construct()
2224 if (dc->ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && in dcn31_resource_construct()
2225 dc->ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0 && in dcn31_resource_construct()
2231 if (dc->ctx->asic_id.chip_family == AMDGPU_FAMILY_GC_11_0_1) in dcn31_resource_construct()

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