Home
last modified time | relevance | path

Searched refs:alpha (Results 1 – 25 of 349) sorted by relevance

12345678910>>...14

/linux/Documentation/gpu/amdgpu/display/
H A Ddisplay-manager.rst94 this DRM property and the alpha blending equations in :ref:`DRM Plane
97 Basically, a blend mode sets the alpha blending equation for plane
98 composition that fits the mode in which the alpha channel affects the state of
100 example, consider the following elements of the alpha blending equation:
103 - *fg.alpha*: Alpha component value from the foreground's pixel.
105 - *plane_alpha*: Plane alpha value set by the **plane "alpha" property**, see
108 in the basic alpha blending equation::
110 out.rgb = alpha * fg.rgb + (1 - alpha) * bg.rgb
112 the alpha channel value of each pixel in a plane is ignored and only the plane
113 alpha affects the resulted pixel color values.
[all …]
/linux/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/
H A Dia_css_xnr3.host.c71 s32 alpha; in compute_alpha() local
75 alpha = XNR_MAX_ALPHA; in compute_alpha()
77 alpha = ((IA_CSS_XNR3_SIGMA_SCALE * XNR_ALPHA_SCALE_FACTOR) + offset) / sigma; in compute_alpha()
79 if (alpha > XNR_MAX_ALPHA) in compute_alpha()
80 alpha = XNR_MAX_ALPHA; in compute_alpha()
83 return alpha; in compute_alpha()
159 to->alpha.y0 = alpha_y0; in ia_css_xnr3_encode()
160 to->alpha.u0 = alpha_u0; in ia_css_xnr3_encode()
161 to->alpha.v0 = alpha_v0; in ia_css_xnr3_encode()
162 to->alpha.ydiff = clamp(alpha_ydiff, min_diff, max_diff); in ia_css_xnr3_encode()
[all …]
/linux/include/video/
H A Dpixel_format.h14 } alpha, red, green, blue; member
27 { 16, false, { .alpha = {0, 0}, .red = {10, 5}, .green = {5, 5}, .blue = {0, 5} } }
30 { 16, false, { .alpha = {0, 0}, .red = {11, 5}, .green = {5, 6}, .blue = {0, 5} } }
33 { 24, false, { .alpha = {0, 0}, .red = {16, 8}, .green = {8, 8}, .blue = {0, 8} } }
36 { 32, false, { .alpha = {0, 0}, .red = {16, 8}, .green = {8, 8}, .blue = {0, 8} } }
39 { 32, false, { .alpha = {0, 0}, .red = {0, 8}, .green = {8, 8}, .blue = {16, 8} } }
42 { 32, false, { .alpha = {0, 0}, .red = {20, 10}, .green = {10, 10}, .blue = {0, 10} } }
78 __pixel_format_cmp_bitfield(lhs, rhs, alpha); in pixel_format_cmp()
/linux/tools/testing/selftests/net/
H A Dlwt_dst_cache_ref_loop.sh85 setup_ns alpha beta gamma &>/dev/null
87 ip link add name veth-alpha netns $alpha type veth \
93 ip -netns $alpha link set veth-alpha name veth0 &>/dev/null
98 ip -netns $alpha addr add 2001:db8:1::2/64 dev veth0 &>/dev/null
99 ip -netns $alpha link set veth0 up &>/dev/null
100 ip -netns $alpha link set lo up &>/dev/null
101 ip -netns $alpha route add 2001:db8:2::/64 \
122 ip netns exec $alpha ping6 -c 5 -W 1 2001:db8:2::2 &>/dev/null
133 cleanup_ns $alpha $beta $gamma
191 ip netns exec $alpha ping6 -c 2 -W 1 2001:db8:2::2 &>/dev/null
[all …]
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_reg.c1800 static bool is_opaque(u16 alpha) in is_opaque() argument
1802 return (alpha >> 8) == 0xff; in is_opaque()
1806 struct vop2_alpha *alpha) in vop2_parse_alpha() argument
1815 alpha->src_color_ctrl.val = 0; in vop2_parse_alpha()
1816 alpha->dst_color_ctrl.val = 0; in vop2_parse_alpha()
1817 alpha->src_alpha_ctrl.val = 0; in vop2_parse_alpha()
1818 alpha->dst_alpha_ctrl.val = 0; in vop2_parse_alpha()
1821 alpha->src_color_ctrl.bits.blend_mode = ALPHA_GLOBAL; in vop2_parse_alpha()
1823 alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX; in vop2_parse_alpha()
1825 alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL; in vop2_parse_alpha()
[all …]
/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-dtg.c91 u32 alpha; member
170 dtg->alpha = 255; in dcss_dtg_init()
173 ((dtg->alpha << DEFAULT_FG_ALPHA_POS) & DEFAULT_FG_ALPHA_MASK); in dcss_dtg_init()
262 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha) in dcss_dtg_global_alpha_changed() argument
267 return alpha != dtg->alpha; in dcss_dtg_global_alpha_changed()
271 const struct drm_format_info *format, int alpha) in dcss_dtg_plane_alpha_set() argument
281 if (!format->has_alpha || alpha != 255) in dcss_dtg_plane_alpha_set()
282 dtg->alpha_cfg = (alpha << DEFAULT_FG_ALPHA_POS) & DEFAULT_FG_ALPHA_MASK; in dcss_dtg_plane_alpha_set()
286 dtg->alpha = alpha; in dcss_dtg_plane_alpha_set()
/linux/net/ipv4/
H A Dtcp_illinois.c50 u32 alpha; /* Additive increase */ member
73 ca->alpha = ALPHA_MAX; in tcp_illinois_init()
140 static u32 alpha(struct illinois *ca, u32 da, u32 dm) in alpha() function
153 return ca->alpha; in alpha()
228 ca->alpha = ALPHA_BASE; in update_params()
234 ca->alpha = alpha(ca, da, dm); in update_params()
249 ca->alpha = ALPHA_BASE; in tcp_illinois_state()
286 delta = (tp->snd_cwnd_cnt * ca->alpha) >> ALPHA_SHIFT; in tcp_illinois_cong_avoid()
H A Dtcp_dctcp.c136 u32 alpha = ca->dctcp_alpha; in dctcp_update_alpha() local
154 alpha -= min_not_zero(alpha, alpha >> dctcp_shift_g); in dctcp_update_alpha()
163 alpha = min(alpha + delivered_ce, DCTCP_MAX_ALPHA); in dctcp_update_alpha()
169 WRITE_ONCE(ca->dctcp_alpha, alpha); in dctcp_update_alpha()
H A Dtcp_htcp.c27 u32 alpha; /* Fixed point arith, << 7 */ member
127 if (ca->packetcount >= tcp_snd_cwnd(tp) - (ca->alpha >> 7 ? : 1) && in measure_achieved_throughput()
194 ca->alpha = 2 * factor * ((1 << 7) - ca->beta); in htcp_alpha_update()
195 if (!ca->alpha) in htcp_alpha_update()
196 ca->alpha = ALPHA_BASE; in htcp_alpha_update()
245 if ((tp->snd_cwnd_cnt * ca->alpha)>>7 >= tcp_snd_cwnd(tp)) { in htcp_cong_avoid()
262 ca->alpha = ALPHA_BASE; in htcp_init()
/linux/tools/testing/selftests/bpf/progs/
H A Dbpf_dctcp.c127 __u32 alpha = ca->dctcp_alpha; in BPF_PROG() local
131 alpha -= min_not_zero(alpha, alpha >> dctcp_shift_g); in BPF_PROG()
141 alpha = min(alpha + delivered_ce, DCTCP_MAX_ALPHA); in BPF_PROG()
143 ca->dctcp_alpha = alpha; in BPF_PROG()
/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-g-fbuf.rst227 - The device supports clipping/blending using the alpha channel of
232 - The device supports alpha blending using a global alpha value.
236 - The device supports clipping/blending using the inverted alpha
289 - Use the alpha channel of the framebuffer to clip or blend
291 output = framebuffer pixel * alpha + video pixel * (1 - alpha).
292 The actual alpha depth depends on the framebuffer pixel format.
295 - Use a global alpha value to blend the framebuffer with video
296 images. The blend function is: output = (framebuffer pixel * alpha
297 + video pixel * (255 - alpha)) / 255. The alpha value is
304 - Like ``V4L2_FBUF_FLAG_LOCAL_ALPHA``, use the alpha channel of the
[all …]
H A Dpixfmt-rgb.rst18 presence of an alpha component or additional padding bits.
20 The usage and value of the alpha bits in formats that support them (named ARGB
21 or a permutation thereof, collectively referred to as alpha formats) depend on
23 (including capture queues of mem-to-mem devices) fill the alpha component in
24 memory. When the device captures an alpha channel the alpha component will have
25 a meaningful value. Otherwise, when the device doesn't capture an alpha channel
26 but can set the alpha bit to a user-configurable value, the
27 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
28 specify that alpha value, and the alpha component of all pixels will be set to
30 an alpha component (XRGB or XBGR) must be used instead of an alpha format.
[all …]
/linux/drivers/gpu/drm/fsl-dcu/
H A Dfsl_dcu_drm_plane.c89 unsigned int alpha = DCU_LAYER_AB_NONE, bpp; in fsl_dcu_drm_plane_atomic_update() local
109 alpha = DCU_LAYER_AB_WHOLE_FRAME; in fsl_dcu_drm_plane_atomic_update()
115 alpha = DCU_LAYER_AB_WHOLE_FRAME; in fsl_dcu_drm_plane_atomic_update()
121 alpha = DCU_LAYER_AB_WHOLE_FRAME; in fsl_dcu_drm_plane_atomic_update()
145 alpha); in fsl_dcu_drm_plane_atomic_update()
/linux/drivers/gpu/drm/logicvc/
H A Dlogicvc_layer.c64 .alpha = true,
194 u32 alpha; in logicvc_plane_atomic_update() local
213 alpha = new_state->alpha * alpha_max / DRM_BLEND_ALPHA_OPAQUE; in logicvc_plane_atomic_update()
216 alpha, alpha_max); in logicvc_plane_atomic_update()
219 alpha); in logicvc_plane_atomic_update()
355 bool alpha; in logicvc_layer_formats_lookup() local
358 alpha = (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_PIXEL); in logicvc_layer_formats_lookup()
363 logicvc_layer_formats[i].alpha == alpha) in logicvc_layer_formats_lookup()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgf108.c740 const u32 alpha = grctx->alpha_nr; in gf108_grctx_generate_attrib() local
748 gf100_grctx_patch_wr32(chan, 0x405830, (beta << 16) | alpha); in gf108_grctx_generate_attrib()
749 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gf108_grctx_generate_attrib()
753 const u32 a = alpha; in gf108_grctx_generate_attrib()
H A Dctxgp102.c44 const u32 alpha = grctx->alpha_nr; in gp102_grctx_generate_attrib() local
54 gf100_grctx_patch_wr32(chan, 0x40585c, alpha); in gp102_grctx_generate_attrib()
55 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gp102_grctx_generate_attrib()
59 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
H A Dctxgp100.c46 const u32 alpha = grctx->alpha_nr; in gp100_grctx_generate_attrib() local
55 gf100_grctx_patch_wr32(chan, 0x40585c, alpha); in gp100_grctx_generate_attrib()
56 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gp100_grctx_generate_attrib()
60 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
H A Dctxgf117.c248 const u32 alpha = grctx->alpha_nr; in gf117_grctx_generate_attrib() local
256 gf100_grctx_patch_wr32(chan, 0x405830, (beta << 16) | alpha); in gf117_grctx_generate_attrib()
257 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches); in gf117_grctx_generate_attrib()
261 const u32 a = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
/linux/arch/alpha/
H A DMakefile35 libs-y += arch/alpha/lib/
41 boot := arch/alpha/boot
53 $(Q)$(MAKE) $(build)=arch/alpha/kernel/syscalls all
/linux/Documentation/translations/zh_CN/mm/
H A Dactive_mm.rst86 变了接口以适配alpha(谁会想到呢,但alpha体系结构上下文切换代码实际上最终是
87 最丑陋的之一--不像其他架构的MM和寄存器状态是分开的,alpha的PALcode将两者
/linux/kernel/bpf/
H A Dtnum.c77 u64 dv, alpha, beta, chi, mu; in tnum_sub() local
80 alpha = dv + a.mask; in tnum_sub()
82 chi = alpha ^ beta; in tnum_sub()
94 u64 alpha, beta, v; in tnum_and() local
96 alpha = a.value | a.mask; in tnum_and()
99 return TNUM(v, alpha & beta & ~v); in tnum_and()
/linux/drivers/gpu/drm/tegra/
H A Dplane.c554 unsigned int *alpha) in tegra_plane_format_get_alpha() argument
557 *alpha = opaque; in tegra_plane_format_get_alpha()
563 *alpha = WIN_COLOR_DEPTH_B5G5R5A1; in tegra_plane_format_get_alpha()
567 *alpha = WIN_COLOR_DEPTH_A1B5G5R5; in tegra_plane_format_get_alpha()
571 *alpha = WIN_COLOR_DEPTH_R8G8B8A8; in tegra_plane_format_get_alpha()
575 *alpha = WIN_COLOR_DEPTH_B8G8R8A8; in tegra_plane_format_get_alpha()
579 *alpha = opaque; in tegra_plane_format_get_alpha()
685 state->blending[index].alpha = true; in tegra_plane_update_transparency()
687 state->blending[index].alpha = false; in tegra_plane_update_transparency()
/linux/drivers/gpu/drm/ci/xfails/
H A Di915-amly-fails.txt32 kms_plane_alpha_blend@alpha-basic,Fail
33 kms_plane_alpha_blend@alpha-opaque-fb,Fail
34 kms_plane_alpha_blend@alpha-transparent-fb,Fail
35 kms_plane_alpha_blend@constant-alpha-max,Fail
H A Di915-apl-fails.txt28 kms_plane_alpha_blend@alpha-basic,Fail
29 kms_plane_alpha_blend@alpha-opaque-fb,Fail
30 kms_plane_alpha_blend@alpha-transparent-fb,Fail
31 kms_plane_alpha_blend@constant-alpha-max,Fail
/linux/net/sched/
H A Dsch_pie.c179 WRITE_ONCE(q->params.alpha, nla_get_u32(tb[TCA_PIE_ALPHA])); in pie_change()
311 u64 alpha, beta; in pie_calculate_probability() local
341 alpha = ((u64)params->alpha * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 4; in pie_calculate_probability()
348 alpha >>= 1; in pie_calculate_probability()
354 alpha >>= 2; in pie_calculate_probability()
361 delta += alpha * (qdelay - params->target); in pie_calculate_probability()
484 nla_put_u32(skb, TCA_PIE_ALPHA, READ_ONCE(q->params.alpha)) || in pie_dump()

12345678910>>...14