| /linux/fs/btrfs/tests/ |
| H A D | free-space-tree-tests.c | 154 u32 alignment) in test_empty_block_group() argument
168 u32 alignment) in test_remove_all() argument
188 u32 alignment) in test_remove_beginning() argument
191 {cache->start + alignment, cache->length - alignment}, in test_remove_beginning()
196 cache->start, alignment); in test_remove_beginning()
211 u32 alignment) in test_remove_end() argument
214 {cache->start, cache->length - alignment}, in test_remove_end()
219 btrfs_block_group_end(cache) - alignment, in test_remove_end()
220 alignment); in test_remove_end()
234 u32 alignment) in test_remove_middle() argument
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| /linux/tools/testing/selftests/exec/ |
| H A D | load_address.c | 13 unsigned long long alignment; member
28 stats->alignment = 0; in ExtractStatistics()
43 if (align > stats->alignment) in ExtractStatistics()
44 stats->alignment = align; in ExtractStatistics()
78 extracted.load_address, extracted.alignment); in main()
90 ksft_test_result(extracted.alignment != 0, in main()
91 "Alignment%s found\n", extracted.alignment ? "" : " NOT"); in main()
94 pow2 = extracted.alignment & (extracted.alignment - 1); in main()
97 pow2 == 0 ? "" : " NOT", extracted.alignment); in main()
100 misalign = extracted.load_address & (extracted.alignment - 1); in main()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_gem_gtt.c | 192 u64 size, u64 alignment, unsigned long color, in i915_gem_gtt_insert() argument
203 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); in i915_gem_gtt_insert()
204 GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); in i915_gem_gtt_insert()
214 if (unlikely(round_up(start, alignment) > round_down(end - size, alignment))) in i915_gem_gtt_insert()
230 if (alignment <= I915_GTT_MIN_ALIGNMENT) in i915_gem_gtt_insert()
231 alignment = 0; in i915_gem_gtt_insert()
234 size, alignment, color, in i915_gem_gtt_insert()
241 size, alignment, color, in i915_gem_gtt_insert()
275 size, alignment ?: I915_GTT_MIN_ALIGNMENT); in i915_gem_gtt_insert()
284 err = i915_gem_evict_something(vm, ww, size, alignment, color, in i915_gem_gtt_insert()
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| /linux/scripts/ |
| H A D | recordmcount.pl | 174 my $alignment; # The .align value to use for $mcount_section
201 $alignment = 8;
211 $alignment = 4;
225 $alignment = 8;
231 $alignment = 2;
268 $alignment = 2;
274 $alignment = 3;
293 $alignment = 8;
357 $alignment = 2;
360 $alignment = 2;
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| /linux/drivers/misc/ |
| H A D | pci_endpoint_test.c | 139 size_t alignment; member
146 size_t alignment; member
660 struct pci_endpoint_test_xfer_param *param, size_t alignment) in pci_endpoint_test_validate_xfer_params() argument
667 if (param->size > SIZE_MAX - alignment) { in pci_endpoint_test_validate_xfer_params()
693 size_t alignment = test->alignment; in pci_endpoint_test_copy() local
705 ret = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment); in pci_endpoint_test_copy()
721 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL); in pci_endpoint_test_copy()
727 get_random_bytes(orig_src_addr, size + alignment); in pci_endpoint_test_copy()
729 size + alignment, DMA_TO_DEVICE); in pci_endpoint_test_copy()
736 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) { in pci_endpoint_test_copy()
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| /linux/arch/mips/cavium-octeon/executive/ |
| H A D | cvmx-bootmem.c | 131 static void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, in cvmx_bootmem_alloc_range() argument
136 cvmx_bootmem_phy_alloc(size, min_addr, max_addr, alignment, 0); in cvmx_bootmem_alloc_range()
145 uint64_t alignment) in cvmx_bootmem_alloc_address() argument
147 return cvmx_bootmem_alloc_range(size, alignment, address, in cvmx_bootmem_alloc_address()
165 void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment, char *name) in cvmx_bootmem_alloc_named() argument
167 return cvmx_bootmem_alloc_named_range(size, 0, 0, alignment, name); in cvmx_bootmem_alloc_named()
218 uint64_t address_max, uint64_t alignment, in cvmx_bootmem_phy_alloc() argument
235 (unsigned long long)alignment); in cvmx_bootmem_phy_alloc()
279 if (alignment < CVMX_BOOTMEM_ALIGNMENT_SIZE) in cvmx_bootmem_phy_alloc()
280 alignment = CVMX_BOOTMEM_ALIGNMENT_SIZE; in cvmx_bootmem_phy_alloc()
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| /linux/arch/powerpc/lib/ |
| H A D | rheap.c | 253 rh_info_t *rh_create(unsigned int alignment) in rh_create() argument
258 if ((alignment & (alignment - 1)) != 0) in rh_create()
265 info->alignment = alignment; in rh_create()
300 void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks, in rh_init() argument
307 if ((alignment & (alignment - 1)) != 0) in rh_init()
310 info->alignment = alignment; in rh_init()
338 m = info->alignment - 1; in rh_attach_region()
383 m = info->alignment - 1; in rh_detach_region()
442 unsigned long rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owner) in rh_alloc_align() argument
450 if (size <= 0 || (alignment & (alignment - 1)) != 0) in rh_alloc_align()
[all …]
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| /linux/rust/kernel/ |
| H A D | ptr.rs | 183 fn align_down(self, alignment: Alignment) -> Self; in align_down()
199 fn align_up(self, alignment: Alignment) -> Option<Self>; in align_up()
208 fn align_down(self, alignment: Alignment) -> Self {
211 ::core::num::NonZero::<Self>::try_from(alignment.as_nonzero())
218 fn align_up(self, alignment: Alignment) -> Option<Self> {
219 let aligned_down = self.align_down(alignment);
223 Self::try_from(alignment.as_usize())
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_fb_pin.c | 28 unsigned int alignment, in intel_fb_pin_to_dpt() argument
85 if (i915_vma_misplaced(vma, 0, alignment, 0)) { in intel_fb_pin_to_dpt()
91 ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL); in intel_fb_pin_to_dpt()
100 vma->display_alignment = max(vma->display_alignment, alignment); in intel_fb_pin_to_dpt()
114 unsigned int alignment, in intel_fb_pin_to_ggtt() argument
134 if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment))) in intel_fb_pin_to_ggtt()
172 vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment, in intel_fb_pin_to_ggtt()
285 unsigned int alignment = intel_plane_fb_min_alignment(plane_state); in intel_plane_pin_fb() local
287 vma = intel_dpt_pin_to_ggtt(fb->dpt_vm, alignment / 512); in intel_plane_pin_fb()
294 alignment, &plane_state->flags, in intel_plane_pin_fb()
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| /linux/drivers/gpu/drm/tests/ |
| H A D | drm_mm_test.c | 93 static u64 misalignment(struct drm_mm_node *node, u64 alignment) in misalignment() argument
97 if (!alignment) in misalignment()
100 div64_u64_rem(node->start, alignment, &rem); in misalignment()
105 u64 size, u64 alignment, unsigned long color) in assert_node() argument
120 if (misalignment(node, alignment)) { in assert_node()
123 node->start, misalignment(node, alignment), alignment); in assert_node()
219 struct drm_mm_node *node, u64 size, u64 alignment, unsigned long color, in expect_insert() argument
225 size, alignment, color, in expect_insert()
230 size, alignment, color, mode->name, err); in expect_insert()
234 if (!assert_node(test, node, mm, size, alignment, color)) { in expect_insert()
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-iio-dma-buffer | 5 DMA buffers tend to have a alignment requirement for the
6 buffers. If this alignment requirement is not met samples might
9 This property reports the alignment requirements in bytes.
13 The alignment requirements in number of sample sets will depend
15 that the alignment requirement in samples sets might change
17 the alignment requirement reported in bytes by this property
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| /linux/arch/um/drivers/ |
| H A D | cow_user.c | 92 __u32 alignment; member
104 __u32 alignment; member
198 int sectorsize, int alignment, unsigned long long *size) in write_cow_header() argument
252 header->alignment = htobe32(alignment); in write_cow_header()
347 *align_out = be32toh(header->v3.alignment); in read_cow_header()
378 *align_out = be32toh(header->v3_b.alignment); in read_cow_header()
404 int alignment, int *bitmap_offset_out, in init_cow_file() argument
412 alignment, &size); in init_cow_file()
416 *bitmap_offset_out = ROUND_UP(sizeof(struct cow_header_v3), alignment); in init_cow_file()
417 cow_sizes(COW_VERSION, size, sectorsize, alignment, *bitmap_offset_out, in init_cow_file()
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| /linux/Documentation/arch/arm/ |
| H A D | mem_alignment.rst | 2 Memory alignment
6 kernel code lately. Therefore the alignment fixup is now unconditionally
13 Of course this is a bad idea to rely on the alignment trap to perform
16 alignment trap can fixup misaligned access for the exception cases, but at
19 Now for user space applications, it is possible to configure the alignment
30 To change the alignment trap behavior, simply echo a number into
31 /proc/cpu/alignment. The number is made up from various bits:
56 echo 1 > /proc/cpu/alignment
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| /linux/drivers/gpu/drm/ |
| H A D | drm_mm.c | 517 u64 size, u64 alignment, in drm_mm_insert_node_in_range() argument
534 if (alignment <= 1) in drm_mm_insert_node_in_range()
535 alignment = 0; in drm_mm_insert_node_in_range()
540 remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0; in drm_mm_insert_node_in_range()
569 if (alignment) { in drm_mm_insert_node_in_range()
575 div64_u64_rem(adj_start, alignment, &rem); in drm_mm_insert_node_in_range()
579 adj_start += alignment; in drm_mm_insert_node_in_range()
705 u64 alignment, in drm_mm_scan_init_with_range() argument
717 if (alignment <= 1) in drm_mm_scan_init_with_range()
718 alignment = 0; in drm_mm_scan_init_with_range()
[all …]
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| /linux/include/drm/ |
| H A D | drm_mm.h | 232 u64 alignment; member
410 u64 alignment,
435 u64 size, u64 alignment, in drm_mm_insert_node_generic() argument
440 size, alignment, color, in drm_mm_insert_node_generic()
509 u64 size, u64 alignment, unsigned long color,
535 u64 alignment, in drm_mm_scan_init() argument
540 size, alignment, color, in drm_mm_scan_init()
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| /linux/drivers/mtd/ubi/ |
| H A D | vmt.c | 34 __ATTR(alignment, S_IRUGO, vol_attribute_show, NULL);
85 ret = sprintf(buf, "%d\n", vol->alignment); in vol_attribute_show()
228 vol->usable_leb_size = ubi->leb_size - ubi->leb_size % req->alignment; in ubi_create_volume()
247 vol->alignment = req->alignment; in ubi_create_volume()
248 vol->data_pad = ubi->leb_size % vol->alignment; in ubi_create_volume()
307 vtbl_rec.alignment = cpu_to_be32(vol->alignment); in ubi_create_volume()
684 int reserved_pebs, alignment, data_pad, vol_type, name_len, upd_marker; in self_check_volume() local
702 if (vol->reserved_pebs < 0 || vol->alignment < 0 || vol->data_pad < 0 || in self_check_volume()
707 if (vol->alignment > ubi->leb_size || vol->alignment == 0) { in self_check_volume()
712 n = vol->alignment & (ubi->min_io_size - 1); in self_check_volume()
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| H A D | vtbl.c | 160 int i, n, reserved_pebs, alignment, data_pad, vol_type, name_len; in vtbl_check() local
169 alignment = be32_to_cpu(vtbl[i].alignment); in vtbl_check()
193 if (reserved_pebs < 0 || alignment < 0 || data_pad < 0 || in vtbl_check()
199 if (alignment > ubi->leb_size || alignment == 0) { in vtbl_check()
204 n = alignment & (ubi->min_io_size - 1); in vtbl_check()
205 if (alignment != 1 && n) { in vtbl_check()
210 n = ubi->leb_size % alignment; in vtbl_check()
539 vol->alignment = be32_to_cpu(vtbl[i].alignment); in init_volumes()
631 vol->alignment = UBI_LAYOUT_VOLUME_ALIGN; in init_volumes()
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| /linux/arch/powerpc/include/asm/ |
| H A D | rheap.h | 27 unsigned int alignment; member
50 extern rh_info_t *rh_create(unsigned int alignment);
56 extern void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks,
66 extern unsigned long rh_alloc_align(rh_info_t * info, int size, int alignment,
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| /linux/arch/xtensa/lib/ |
| H A D | memset.S | 45 movi a6, 3 # for alignment tests
57 .align 4 # 1 mod 4 alignment for LOOPNEZ
58 .byte 0 # (0 mod 4 alignment for LBEG)
106 bbci.l a5, 0, .L20 # branch if dst alignment half-aligned
126 .byte 0 # 1 mod 4 alignment for LOOPNEZ
127 # (0 mod 4 alignment for LBEG)
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| /linux/drivers/gpu/drm/qxl/ |
| H A D | qxl_gem.c | 47 int alignment, int initial_domain, in qxl_gem_object_create() argument
57 if (alignment < PAGE_SIZE) in qxl_gem_object_create()
58 alignment = PAGE_SIZE; in qxl_gem_object_create()
64 size, initial_domain, alignment, r); in qxl_gem_object_create()
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-bootmem.h | 162 uint64_t alignment);
186 extern void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment,
274 uint64_t address_max, uint64_t alignment,
301 uint64_t alignment,
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| /linux/tools/testing/selftests/kvm/ |
| H A D | kvm_page_table_test.c | 245 uint64_t alignment; in pre_init_before_test() local
250 alignment = max(large_page_size, guest_page_size); in pre_init_before_test()
251 test_mem_size = (test_mem_size + alignment - 1) & ~(alignment - 1); in pre_init_before_test()
265 alignment = max(0x100000UL, alignment); in pre_init_before_test()
267 guest_test_phys_mem = align_down(guest_test_phys_mem, alignment); in pre_init_before_test()
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| H A D | pre_fault_memory_test.c | 164 uint64_t gpa, gva, alignment, guest_page_size; in __test_pre_fault_memory() local
176 alignment = guest_page_size = vm_guest_mode_params[VM_MODE_DEFAULT].page_size; in __test_pre_fault_memory()
179 alignment = max(0x100000UL, guest_page_size); in __test_pre_fault_memory()
181 alignment = SZ_2M; in __test_pre_fault_memory()
183 gpa = align_down(gpa, alignment); in __test_pre_fault_memory()
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| /linux/drivers/platform/wmi/ |
| H A D | marshalling.c | 22 size_t alignment, size; in wmi_adjust_buffer_length() local
30 alignment = 4; in wmi_adjust_buffer_length()
42 alignment = 2; in wmi_adjust_buffer_length()
49 alignment = 1; in wmi_adjust_buffer_length()
56 *length = size_add(ALIGN(*length, alignment), size); in wmi_adjust_buffer_length()
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| /linux/Documentation/core-api/ |
| H A D | unaligned-memory-access.rst | 36 Natural alignment
39 The rule mentioned above forms what we refer to as natural alignment:
43 When writing code, assume the target architecture has natural alignment
46 In reality, only a few architectures require natural alignment on all sizes
48 writing code that satisfies natural alignment requirements is the easiest way
100 Fortunately, the compiler understands the alignment constraints, so in the
126 For a natural alignment scheme, the compiler would only have to add a single
128 to satisfy alignment constraints for arrays of these structures.
137 architectural alignment requirements. However, again, the compiler is aware
138 of the alignment constraints and will generate extra instructions to perform
[all …]
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