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Searched refs:afe_priv (Results 1 – 25 of 56) sorted by relevance

123

/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-afe-clk.c94 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mt8183_init_clock() local
97 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt8183_init_clock()
99 if (!afe_priv->clk) in mt8183_init_clock()
103 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8183_init_clock()
104 if (IS_ERR(afe_priv->clk[i])) { in mt8183_init_clock()
107 PTR_ERR(afe_priv->clk[i])); in mt8183_init_clock()
108 return PTR_ERR(afe_priv->clk[i]); in mt8183_init_clock()
117 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mt8183_afe_enable_clock() local
120 ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUDIO]); in mt8183_afe_enable_clock()
127 ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIO]); in mt8183_afe_enable_clock()
[all …]
H A Dmt8183-dai-adda.c64 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local
72 if (afe_priv->mtkaif_dmic) { in mtk_adda_ul_event()
118 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mt8183_adda_dmic_get() local
120 ucontrol->value.integer.value[0] = afe_priv->mtkaif_dmic; in mt8183_adda_dmic_get()
130 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mt8183_adda_dmic_set() local
136 afe_priv->mtkaif_dmic = ucontrol->value.integer.value[0]; in mt8183_adda_dmic_set()
139 __func__, kcontrol->id.name, afe_priv->mtkaif_dmic); in mt8183_adda_dmic_set()
219 struct mt8183_afe_private *afe_priv = afe->platform_priv; in set_mtkaif_rx() local
223 switch (afe_priv->mtkaif_protocol) { in set_mtkaif_rx()
231 if (afe_priv->mtkaif_phase_cycle[0] >= in set_mtkaif_rx()
[all …]
/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-afe-clk.c76 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_set_audio_int_bus_parent() local
79 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS], in mt8186_set_audio_int_bus_parent()
80 afe_priv->clk[clk_id]); in mt8186_set_audio_int_bus_parent()
93 struct mt8186_afe_private *afe_priv = afe->platform_priv; in apll1_mux_setting() local
97 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_1]); in apll1_mux_setting()
103 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
104 afe_priv->clk[CLK_TOP_APLL1_CK]); in apll1_mux_setting()
113 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
119 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
120 afe_priv->clk[CLK_TOP_APLL1_D8]); in apll1_mux_setting()
[all …]
H A Dmt8186-dai-adda.c47 struct mt8186_afe_private *afe_priv = afe->platform_priv; in get_adda_priv_by_name() local
55 return afe_priv->dai_priv[dai_id]; in get_adda_priv_by_name()
161 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local
162 int mtkaif_dmic = afe_priv->mtkaif_dmic; in mtk_adda_ul_event()
202 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_adda_pad_top_event() local
206 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) in mtk_adda_pad_top_event()
224 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_adda_mtkaif_cfg_event() local
230 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) { in mtk_adda_mtkaif_cfg_event()
239 if (afe_priv->mtkaif_chosen_phase[0] < 0 && in mtk_adda_mtkaif_cfg_event()
240 afe_priv->mtkaif_chosen_phase[1] < 0) { in mtk_adda_mtkaif_cfg_event()
[all …]
H A Dmt8186-misc-control.c79 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_get() local
81 ucontrol->value.integer.value[0] = afe_priv->sgen_mode; in mt8186_sgen_get()
91 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_set() local
105 if (mode == afe_priv->sgen_mode) in mt8186_sgen_set()
123 afe_priv->sgen_mode = mode; in mt8186_sgen_set()
133 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_rate_get() local
135 ucontrol->value.integer.value[0] = afe_priv->sgen_rate; in mt8186_sgen_rate_get()
145 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_rate_set() local
156 if (rate == afe_priv->sgen_rate) in mt8186_sgen_rate_set()
167 afe_priv->sgen_rate = rate; in mt8186_sgen_rate_set()
[all …]
H A Dmt8186-dai-tdm.c105 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_tdm_en_event() local
107 struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; in mtk_tdm_en_event()
132 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_tdm_mck_en_event() local
134 struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; in mtk_tdm_mck_en_event()
204 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_mclk_connect() local
206 struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; in mtk_afe_tdm_mclk_connect()
217 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_mclk_apll_connect() local
219 struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; in mtk_afe_tdm_mclk_apll_connect()
234 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_hd_connect() local
236 struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; in mtk_afe_tdm_hd_connect()
[all …]
H A Dmt8186-audsys-clk.c90 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_audsys_clk_unregister() local
95 if (!afe_priv) in mt8186_audsys_clk_unregister()
99 cl = afe_priv->lookup[i]; in mt8186_audsys_clk_unregister()
112 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_audsys_clk_register() local
117 afe_priv->lookup = devm_kcalloc(afe->dev, CLK_AUD_NR_CLK, in mt8186_audsys_clk_register()
118 sizeof(*afe_priv->lookup), in mt8186_audsys_clk_register()
121 if (!afe_priv->lookup) in mt8186_audsys_clk_register()
147 afe_priv->lookup[i] = cl; in mt8186_audsys_clk_register()
/linux/sound/soc/mediatek/mt8189/
H A Dmt8189-afe-clk.c264 struct mt8189_afe_private *afe_priv = afe->platform_priv; in apll1_mux_setting() local
270 ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]); in apll1_mux_setting()
274 ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
275 afe_priv->clk[MT8189_CLK_TOP_APLL1_CK]); in apll1_mux_setting()
280 ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
284 ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
285 afe_priv->clk[MT8189_CLK_TOP_APLL1_D4]); in apll1_mux_setting()
289 ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]); in apll1_mux_setting()
293 ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H], in apll1_mux_setting()
294 afe_priv->clk[MT8189_CLK_TOP_APLL1_CK]); in apll1_mux_setting()
[all …]
H A Dmt8189-dai-adda.c341 struct mt8189_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local
342 int mtkaif_dmic = afe_priv->mtkaif_dmic; in mtk_adda_ul_event()
368 afe_priv->mtkaif_dmic = 0; in mtk_adda_ul_event()
383 struct mt8189_afe_private *afe_priv = afe->platform_priv; in mtk_adda_pad_top_event() local
386 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) in mtk_adda_pad_top_event()
388 else if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2) in mtk_adda_pad_top_event()
397 static bool is_adda_mtkaif_need_phase_delay(struct mt8189_afe_private *afe_priv) in is_adda_mtkaif_need_phase_delay() argument
399 return afe_priv->mtkaif_chosen_phase[0] >= 0 && in is_adda_mtkaif_need_phase_delay()
400 afe_priv->mtkaif_chosen_phase[1] >= 0; in is_adda_mtkaif_need_phase_delay()
409 struct mt8189_afe_private *afe_priv = afe->platform_priv; in mtk_adda_mtkaif_cfg_event() local
[all …]
/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.c66 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_set_audio_int_bus_parent() local
69 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS], in mt8192_set_audio_int_bus_parent()
70 afe_priv->clk[clk_id]); in mt8192_set_audio_int_bus_parent()
82 struct mt8192_afe_private *afe_priv = afe->platform_priv; in apll1_mux_setting() local
86 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_1]); in apll1_mux_setting()
92 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
93 afe_priv->clk[CLK_TOP_APLL1_CK]); in apll1_mux_setting()
102 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
108 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
109 afe_priv->clk[CLK_TOP_APLL1_D4]); in apll1_mux_setting()
[all …]
H A Dmt8192-dai-adda.c219 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local
220 int mtkaif_dmic = afe_priv->mtkaif_dmic; in mtk_adda_ul_event()
257 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ch34_ul_event() local
258 int mtkaif_dmic = afe_priv->mtkaif_dmic_ch34; in mtk_adda_ch34_ul_event()
259 int mtkaif_adda6_only = afe_priv->mtkaif_adda6_only; in mtk_adda_ch34_ul_event()
298 afe_priv->mtkaif_dmic_ch34 = 0; in mtk_adda_ch34_ul_event()
319 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mtk_adda_pad_top_event() local
323 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) in mtk_adda_pad_top_event()
341 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mtk_adda_mtkaif_cfg_event() local
347 if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) { in mtk_adda_mtkaif_cfg_event()
[all …]
H A Dmt8192-mt6359-rt1015-rt5682.c157 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_mt6359_mtkaif_calibration() local
180 regmap_update_bits(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration()
184 afe_priv->mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */ in mt8192_mt6359_mtkaif_calibration()
185 afe_priv->mtkaif_chosen_phase[0] = -1; in mt8192_mt6359_mtkaif_calibration()
186 afe_priv->mtkaif_chosen_phase[1] = -1; in mt8192_mt6359_mtkaif_calibration()
187 afe_priv->mtkaif_chosen_phase[2] = -1; in mt8192_mt6359_mtkaif_calibration()
190 phase <= afe_priv->mtkaif_calibration_num_phase && in mt8192_mt6359_mtkaif_calibration()
196 regmap_update_bits(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration()
209 regmap_read(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration()
241 afe_priv->mtkaif_chosen_phase[0] < 0) { in mt8192_mt6359_mtkaif_calibration()
[all …]
/linux/sound/soc/mediatek/mt8365/
H A Dmt8365-afe-clk.c37 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_afe_init_audio_clk() local
40 afe_priv->clocks[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8365_afe_init_audio_clk()
41 if (IS_ERR(afe_priv->clocks[i])) { in mt8365_afe_init_audio_clk()
44 return PTR_ERR(afe_priv->clocks[i]); in mt8365_afe_init_audio_clk()
193 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_afe_enable_top_cg() local
199 spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); in mt8365_afe_enable_top_cg()
201 afe_priv->top_cg_ref_cnt[cg_type]++; in mt8365_afe_enable_top_cg()
202 if (afe_priv->top_cg_ref_cnt[cg_type] == 1) in mt8365_afe_enable_top_cg()
205 spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); in mt8365_afe_enable_top_cg()
212 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_afe_disable_top_cg() local
[all …]
H A Dmt8365-dai-i2s.c284 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_dai_set_config() local
286 &afe_priv->be_data[i2s_data->id - MT8365_AFE_BACKEND_BASE]; in mt8365_dai_set_config()
332 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_afe_set_i2s_out() local
334 afe_priv->dai_priv[MT8365_AFE_IO_I2S]; in mt8365_afe_set_i2s_out()
467 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_afe_set_i2s_out_enable() local
472 i2s_data = afe_priv->dai_priv[mt8365_i2s_priv[i].id]; in mt8365_afe_set_i2s_out_enable()
478 spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); in mt8365_afe_set_i2s_out_enable()
494 spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); in mt8365_afe_set_i2s_out_enable()
520 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_dai_i2s_startup() local
521 struct mtk_afe_i2s_priv *i2s_data = afe_priv->dai_priv[dai->id]; in mt8365_dai_i2s_startup()
[all …]
/linux/sound/soc/mediatek/mt6797/
H A Dmt6797-afe-clk.c36 struct mt6797_afe_private *afe_priv = afe->platform_priv; in mt6797_init_clock() local
39 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt6797_init_clock()
41 if (!afe_priv->clk) in mt6797_init_clock()
45 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt6797_init_clock()
46 if (IS_ERR(afe_priv->clk[i])) { in mt6797_init_clock()
49 PTR_ERR(afe_priv->clk[i])); in mt6797_init_clock()
50 return PTR_ERR(afe_priv->clk[i]); in mt6797_init_clock()
59 struct mt6797_afe_private *afe_priv = afe->platform_priv; in mt6797_afe_enable_clock() local
62 ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD]); in mt6797_afe_enable_clock()
69 ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]); in mt6797_afe_enable_clock()
[all …]
/linux/sound/soc/mediatek/mt2701/
H A Dmt2701-afe-clock-ctrl.c27 struct mt2701_afe_private *afe_priv = afe->platform_priv; in mt2701_init_clock() local
31 afe_priv->base_ck[i] = devm_clk_get(afe->dev, base_clks[i]); in mt2701_init_clock()
32 if (IS_ERR(afe_priv->base_ck[i])) { in mt2701_init_clock()
34 return PTR_ERR(afe_priv->base_ck[i]); in mt2701_init_clock()
39 for (i = 0; i < afe_priv->soc->i2s_num; i++) { in mt2701_init_clock()
40 struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[i]; in mt2701_init_clock()
90 afe_priv->mrgif_ck = devm_clk_get(afe->dev, "audio_mrgif_pd"); in mt2701_init_clock()
91 if (IS_ERR(afe_priv->mrgif_ck)) { in mt2701_init_clock()
92 if (PTR_ERR(afe_priv->mrgif_ck) == -EPROBE_DEFER) in mt2701_init_clock()
95 afe_priv->mrgif_ck = NULL; in mt2701_init_clock()
[all …]
/linux/sound/soc/mediatek/mt8188/
H A Dmt8188-afe-clk.c262 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_tuner_clk() local
266 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]); in mt8188_afe_enable_tuner_clk()
267 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]); in mt8188_afe_enable_tuner_clk()
270 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]); in mt8188_afe_enable_tuner_clk()
271 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]); in mt8188_afe_enable_tuner_clk()
283 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_tuner_clk() local
287 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]); in mt8188_afe_disable_tuner_clk()
288 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]); in mt8188_afe_disable_tuner_clk()
291 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]); in mt8188_afe_disable_tuner_clk()
292 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]); in mt8188_afe_disable_tuner_clk()
[all …]
H A Dmt8188-dai-dmic.c238 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dai_dmic_hw_gain_enable() local
239 struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; in mtk_dai_dmic_hw_gain_enable()
261 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dmic_gain_event() local
262 struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; in mtk_dmic_gain_event()
291 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dmic_event() local
292 struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; in mtk_dmic_event()
337 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]); in mtk_dmic_event()
338 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]); in mtk_dmic_event()
339 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]); in mtk_dmic_event()
340 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]); in mtk_dmic_event()
[all …]
H A Dmt8188-dai-adda.c34 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_adda_mtkaif_init() local
35 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8188_adda_mtkaif_init()
138 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local
139 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mtk_adda_ul_event()
162 struct mt8188_afe_private *afe_priv = afe->platform_priv; in get_adda_priv_by_name() local
165 return afe_priv->dai_priv[MT8188_AFE_IO_UL_SRC]; in get_adda_priv_by_name()
167 return afe_priv->dai_priv[MT8188_AFE_IO_DL_SRC]; in get_adda_priv_by_name()
315 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_adda_dmic_get() local
316 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8188_adda_dmic_get()
327 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_adda_dmic_set() local
[all …]
H A Dmt8188-dai-etdm.c249 struct mt8188_afe_private *afe_priv = afe->platform_priv; in is_cowork_mode() local
254 etdm_data = afe_priv->dai_priv[dai->id]; in is_cowork_mode()
281 struct mt8188_afe_private *afe_priv = afe->platform_priv; in get_etdm_cowork_master_id() local
287 etdm_data = afe_priv->dai_priv[dai->id]; in get_etdm_cowork_master_id()
376 struct mt8188_afe_private *afe_priv = afe->platform_priv; in get_etdm_priv_by_name() local
383 return afe_priv->dai_priv[dai_id]; in get_etdm_priv_by_name()
388 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dai_etdm_enable_mclk() local
401 etdm_data = afe_priv->dai_priv[dai_id]; in mtk_dai_etdm_enable_mclk()
422 mt8188_afe_enable_clk(afe, afe_priv->clk[clkmux_id]); in mtk_dai_etdm_enable_mclk()
425 ret = mt8188_afe_set_clk_parent(afe, afe_priv->clk[clkmux_id], in mtk_dai_etdm_enable_mclk()
[all …]
/linux/sound/soc/mediatek/mt8195/
H A Dmt8195-afe-clk.c243 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_enable_tuner_clk() local
247 mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]); in mt8195_afe_enable_tuner_clk()
248 mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]); in mt8195_afe_enable_tuner_clk()
251 mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]); in mt8195_afe_enable_tuner_clk()
252 mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]); in mt8195_afe_enable_tuner_clk()
264 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_disable_tuner_clk() local
268 mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]); in mt8195_afe_disable_tuner_clk()
269 mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]); in mt8195_afe_disable_tuner_clk()
272 mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]); in mt8195_afe_disable_tuner_clk()
273 mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]); in mt8195_afe_disable_tuner_clk()
[all …]
H A Dmt8195-dai-adda.c40 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_adda_mtkaif_init() local
41 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8195_adda_mtkaif_init()
185 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local
186 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mtk_adda_ul_event()
212 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mtk_adda6_ul_event() local
213 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mtk_adda6_ul_event()
248 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mtk_audio_hires_event() local
249 struct clk *clk = afe_priv->clk[MT8195_CLK_TOP_AUDIO_H_SEL]; in mtk_audio_hires_event()
257 clk_parent = afe_priv->clk[MT8195_CLK_TOP_APLL1]; in mtk_audio_hires_event()
260 clk_parent = afe_priv->clk[MT8195_CLK_XTAL_26M]; in mtk_audio_hires_event()
[all …]
H A Dmt8195-dai-etdm.c270 struct mt8195_afe_private *afe_priv = afe->platform_priv; in is_cowork_mode() local
276 etdm_data = afe_priv->dai_priv[dai->id]; in is_cowork_mode()
302 struct mt8195_afe_private *afe_priv = afe->platform_priv; in get_etdm_cowork_master_id() local
309 etdm_data = afe_priv->dai_priv[dai->id]; in get_etdm_cowork_master_id()
1319 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_enable_etdm() local
1326 etdm_data = afe_priv->dai_priv[dai_id]; in mt8195_afe_enable_etdm()
1327 spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); in mt8195_afe_enable_etdm()
1338 spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); in mt8195_afe_enable_etdm()
1346 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_disable_etdm() local
1353 etdm_data = afe_priv in mt8195_afe_disable_etdm()
1408 struct mt8195_afe_private *afe_priv = afe->platform_priv; mt8195_etdm_sync_mode_configure() local
1550 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_enable_mclk() local
1563 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_disable_mclk() local
1579 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_startup() local
1620 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_shutdown() local
1691 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_in_configure() local
1816 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_out_configure() local
1912 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_mclk_configure() local
1967 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_configure() local
2046 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_hw_params() local
2099 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_trigger() local
2153 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_cal_mclk() local
2190 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_set_sysclk() local
2214 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_set_tdm_slot() local
2232 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_set_fmt() local
2298 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_hdmitx_dptx_startup() local
2313 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_hdmitx_dptx_shutdown() local
2355 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_hdmitx_dptx_hw_params() local
2443 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_hdmitx_dptx_set_sysclk() local
2468 struct mt8195_afe_private *afe_priv = afe->platform_priv; mtk_dai_etdm_probe() local
2595 struct mt8195_afe_private *afe_priv = afe->platform_priv; mt8195_etdm_update_sync_info() local
2623 struct mt8195_afe_private *afe_priv = afe->platform_priv; mt8195_dai_etdm_parse_of() local
2736 struct mt8195_afe_private *afe_priv = afe->platform_priv; init_etdm_priv_data() local
[all...]
/linux/sound/soc/mediatek/mt8173/
H A Dmt8173-afe-pcm.c326 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_i2s_prepare() local
329 mt8173_afe_dais_set_clks(afe, afe_priv->clocks[MT8173_CLK_I2S1_M], in mt8173_afe_i2s_prepare()
331 mt8173_afe_dais_set_clks(afe, afe_priv->clocks[MT8173_CLK_I2S2_M], in mt8173_afe_i2s_prepare()
347 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_hdmi_startup() local
352 mt8173_afe_dais_enable_clks(afe, afe_priv->clocks[MT8173_CLK_I2S3_M], in mt8173_afe_hdmi_startup()
353 afe_priv->clocks[MT8173_CLK_I2S3_B]); in mt8173_afe_hdmi_startup()
361 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_hdmi_shutdown() local
366 mt8173_afe_dais_disable_clks(afe, afe_priv->clocks[MT8173_CLK_I2S3_M], in mt8173_afe_hdmi_shutdown()
367 afe_priv->clocks[MT8173_CLK_I2S3_B]); in mt8173_afe_hdmi_shutdown()
375 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_hdmi_prepare() local
[all …]
/linux/sound/soc/mediatek/mt7986/
H A Dmt7986-afe-pcm.c323 struct mt7986_afe_private *afe_priv = afe->platform_priv; in mt7986_init_clock() local
326 afe_priv->clks = devm_kcalloc(afe->dev, CLK_NUM, in mt7986_init_clock()
327 sizeof(*afe_priv->clks), GFP_KERNEL); in mt7986_init_clock()
328 if (!afe_priv->clks) in mt7986_init_clock()
330 afe_priv->num_clks = CLK_NUM; in mt7986_init_clock()
332 for (i = 0; i < afe_priv->num_clks; i++) in mt7986_init_clock()
333 afe_priv->clks[i].id = aud_clks[i]; in mt7986_init_clock()
335 ret = devm_clk_bulk_get(afe->dev, afe_priv->num_clks, afe_priv->clks); in mt7986_init_clock()
390 struct mt7986_afe_private *afe_priv = afe->platform_priv; in mt7986_afe_runtime_suspend() local
392 if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl) in mt7986_afe_runtime_suspend()
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