Searched refs:a6xx (Results 1 – 5 of 5) sorted by relevance
694 .a6xx = &(const struct a6xx_info) {725 .a6xx = &(const struct a6xx_info) {744 .a6xx = &(const struct a6xx_info) {775 .a6xx = &(const struct a6xx_info) {801 .a6xx = &(const struct a6xx_info) {825 .a6xx = &(const struct a6xx_info) {850 .a6xx = &(const struct a6xx_info) {875 .a6xx = &(const struct a6xx_info) {901 .a6xx = &(const struct a6xx_info) {924 .a6xx = &(const struct a6xx_info) {[all …]
635 if (!(adreno_gpu->info->a6xx->hwcg || adreno_is_a7xx(adreno_gpu))) in a6xx_set_hwcg()662 state ? adreno_gpu->info->a6xx->gmu_cgc_mode : 0); in a6xx_set_hwcg()668 if (!adreno_gpu->info->a6xx->hwcg) { in a6xx_set_hwcg()697 for (i = 0; (reg = &adreno_gpu->info->a6xx->hwcg[i], reg->offset); i++) in a6xx_set_hwcg()710 const struct adreno_protect *protect = adreno_gpu->info->a6xx->protect; in a6xx_set_cp_protect()884 reglist = adreno_gpu->info->a6xx->ifpc_reglist; in a7xx_patch_pwrup_reglist()898 reglist = adreno_gpu->info->a6xx->pwrup_reglist; in a7xx_patch_pwrup_reglist()921 dyn_pwrup_reglist = adreno_gpu->info->a6xx->dyn_pwrup_reglist; in a7xx_patch_pwrup_reglist()1392 if (adreno_gpu->info->a6xx->prim_fifo_threshold) in hw_init()1394 adreno_gpu->info->a6xx->prim_fifo_threshold); in hw_init()
89 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a8xx_gpu_get_slice_info()197 state ? adreno_gpu->info->a6xx->gmu_cgc_mode : 0); in a8xx_set_hwcg()228 const struct adreno_protect *protect = adreno_gpu->info->a6xx->protect; in a8xx_set_cp_protect()361 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a8xx_nonctxt_config()
123 const struct a6xx_info *a6xx; member
796 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a6xx_hfi_send_bw_table()