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Searched refs:_offset (Results 1 – 25 of 132) sorted by relevance

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/linux/drivers/thermal/qcom/
H A Dtsens.h90 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ argument
91 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
92 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
93 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
94 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
95 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
96 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
97 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
98 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
99 [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
[all …]
/linux/include/linux/firmware/thead/
H A Dthead,th1520-aon.h103 u64 _offset = (OFFSET); \
105 data[_offset + 7] = _set_data & 0xFF; \
106 data[_offset + 6] = (_set_data & 0xFF00) >> 8; \
107 data[_offset + 5] = (_set_data & 0xFF0000) >> 16; \
108 data[_offset + 4] = (_set_data & 0xFF000000) >> 24; \
109 data[_offset + 3] = (_set_data & 0xFF00000000) >> 32; \
110 data[_offset + 2] = (_set_data & 0xFF0000000000) >> 40; \
111 data[_offset + 1] = (_set_data & 0xFF000000000000) >> 48; \
112 data[_offset + 0] = (_set_data & 0xFF00000000000000) >> 56; \
118 u64 _offset = (OFFSET); \
[all …]
/linux/drivers/clk/bcm/
H A Dclk-kona.h91 #define POLICY(_offset, _bit) \ argument
93 .offset = (_offset), \
151 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
153 .offset = (_offset), \
163 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
165 .offset = (_offset), \
174 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
176 .offset = (_offset), \
185 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ argument
187 .offset = (_offset), \
[all …]
/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dcore_acl_flex_keys.h56 #define MLXSW_AFK_ELEMENT_INFO(_type, _element, _offset, _shift, _size) \ argument
61 .offset = _offset, \
68 #define MLXSW_AFK_ELEMENT_INFO_U32(_element, _offset, _shift, _size) \ argument
70 _element, _offset, _shift, _size)
72 #define MLXSW_AFK_ELEMENT_INFO_BUF(_element, _offset, _size) \ argument
74 _element, _offset, 0, _size)
88 #define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \ argument
94 .offset = _offset, \
103 #define MLXSW_AFK_ELEMENT_INST_U32(_element, _offset, _shift, _size) \ argument
105 _element, _offset, _shift, _size, 0, false)
[all …]
H A Ditem.h270 #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
272 .offset = _offset, \
288 #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
291 .offset = _offset, \
313 #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
315 .offset = _offset, \
331 #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
334 .offset = _offset, \
356 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
358 .offset = _offset, \
[all …]
/linux/crypto/krb5/
H A Dkrb5_api.c64 size_t data_size, size_t *_offset) in crypto_krb5_how_much_buffer() argument
68 *_offset = krb5->cksum_len; in crypto_krb5_how_much_buffer()
72 *_offset = krb5->conf_len; in crypto_krb5_how_much_buffer()
77 *_offset = 0; in crypto_krb5_how_much_buffer()
98 size_t *_buffer_size, size_t *_offset) in crypto_krb5_how_much_data() argument
106 *_offset = krb5->cksum_len; in crypto_krb5_how_much_data()
113 *_offset = krb5->conf_len; in crypto_krb5_how_much_data()
122 *_offset = 0; in crypto_krb5_how_much_data()
140 size_t *_offset, size_t *_len) in crypto_krb5_where_is_the_data() argument
144 *_offset += krb5->cksum_len; in crypto_krb5_where_is_the_data()
[all …]
/linux/rust/kernel/
H A Dio.rs372 fn try_read8(&self, _offset: usize) -> Result<u8> in try_read8()
381 fn try_read16(&self, _offset: usize) -> Result<u16> in try_read16()
390 fn try_read32(&self, _offset: usize) -> Result<u32> in try_read32()
399 fn try_read64(&self, _offset: usize) -> Result<u64> in try_read64()
408 fn try_write8(&self, _value: u8, _offset: usize) -> Result in try_write8()
417 fn try_write16(&self, _value: u16, _offset: usize) -> Result in try_write16()
426 fn try_write32(&self, _value: u32, _offset: usize) -> Result in try_write32()
435 fn try_write64(&self, _value: u64, _offset: usize) -> Result in try_write64()
444 fn read8(&self, _offset: usize) -> u8 in read8()
453 fn read16(&self, _offset: usize) -> u16 in read16()
[all …]
/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c132 #define MUX(_name, _parents, _offset, \ argument
134 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
139 #define MUX_FLAGS(_name, _parents, _offset,\ argument
141 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
146 #define MUX8(_name, _parents, _offset, \ argument
148 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
153 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ argument
154 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
159 #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \ argument
160 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
[all …]
/linux/drivers/net/wireless/mediatek/mt76/
H A Ddma.h52 u32 _offset = offsetof(struct mt76_queue_regs, _field); \
57 _offset)); \
64 u32 _offset = offsetof(struct mt76_queue_regs, _field); \
67 ((_q)->wed_regs + _offset), \
76 u32 _offset = offsetof(struct mt76_queue_regs, _field); \
85 ((_q)->wed_regs + _offset), &_val); \
94 u32 _offset = offsetof(struct mt76_queue_regs, _field); \
102 ((_q)->wed_regs + _offset), _val); \
/linux/drivers/clk/renesas/
H A Drcar-gen4-cpg.h35 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument
36 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SDH, _parent, .offset = _offset)
38 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument
39 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset)
61 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ argument
62 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drcar-gen3-cpg.h37 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ argument
38 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset)
40 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
41 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
60 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
61 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drzv2h-cpg.h28 #define PLL_PACK_LIMITS(_offset, _has_clkn, _instance, _limits) \ argument
30 .offset = _offset, \
36 #define PLL_PACK(_offset, _has_clkn, _instance) \ argument
37 PLL_PACK_LIMITS(_offset, _has_clkn, _instance, NULL)
68 #define DDIV_PACK(_offset, _shift, _width, _monbit) \ argument
70 .offset = _offset, \
76 #define DDIV_PACK_NO_RMW(_offset, _shift, _width, _monbit) \ argument
78 .offset = (_offset), \
98 #define SMUX_PACK(_offset, _shift, _width) \ argument
100 .offset = (_offset), \
H A Drenesas-cpg-mssr.h80 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
81 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
82 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
83 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
/linux/net/rxrpc/
H A Drxgk_common.h72 unsigned int *_offset, unsigned int *_len, in rxgk_decrypt_skb() argument
80 nr_sg = skb_to_sgvec(skb, sg, *_offset, len); in rxgk_decrypt_skb()
88 *_offset += offset; in rxgk_decrypt_skb()
116 unsigned int *_offset, unsigned int *_len, in rxgk_verify_mic_skb() argument
124 nr_sg = skb_to_sgvec(skb, sg, *_offset, len); in rxgk_verify_mic_skb()
132 *_offset += offset; in rxgk_verify_mic_skb()
/linux/drivers/clk/
H A Dclk-loongson2.c59 #define CLK_DIV(_id, _name, _pname, _offset, _dshift, _dwidth) \ argument
65 .reg_offset = _offset, \
70 #define CLK_PLL(_id, _name, _offset, _mshift, _mwidth, \ argument
77 .reg_offset = _offset, \
84 #define CLK_SCALE(_id, _name, _pname, _offset, \ argument
91 .reg_offset = _offset, \
96 #define CLK_SCALE_MODE(_id, _name, _pname, _offset, \ argument
103 .reg_offset = _offset, \
109 #define CLK_GATE(_id, _name, _pname, _offset, _bidx) \ argument
115 .reg_offset = _offset, \
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.h109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ argument
112 .offset = _offset, \
134 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ argument
137 .offset = _offset, \
157 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ argument
162 .offset = _offset, \
/linux/drivers/bcma/
H A Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
186 bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
189 bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
190 sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
194 SPEX(_field[0], _offset + 0, _mask, _shift); \
195 SPEX(_field[1], _offset + 2, _mask, _shift); \
196 SPEX(_field[2], _offset + 4, _mask, _shift); \
197 SPEX(_field[3], _offset + 6, _mask, _shift); \
[all …]
/linux/include/crypto/
H A Dkrb5.h120 size_t data_size, size_t *_offset);
123 size_t *_buffer_size, size_t *_offset);
126 size_t *_offset, size_t *_len);
142 size_t *_offset, size_t *_len);
153 size_t *_offset, size_t *_len);
/linux/drivers/clk/sunxi-ng/
H A Dccu_mult.h17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ argument
21 .offset = _offset, \
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ argument
30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
/linux/drivers/clk/sprd/
H A Ddiv.h28 #define _SPRD_DIV_CLK(_offset, _shift, _width) \ argument
30 .offset = _offset, \
40 #define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _offset, \ argument
43 .div = _SPRD_DIV_CLK(_offset, _shift, _width), \
/linux/arch/riscv/include/asm/
H A Dvdso.h29 (void __user *)((unsigned long)(base) + __vdso_##name##_offset))
32 ((void __user *)((unsigned long)(base) + __vdso_##name##_offset))
39 (void __user *)((unsigned long)(base) + compat__vdso_##name##_offset)
/linux/drivers/dpll/zl3073x/
H A Dregs.h47 #define ZL_REG_IDX(_idx, _page, _offset, _size, _items, _stride) \ argument
49 (_offset) + (_idx) * (_stride)) | \
53 (_offset) + ((_items) - 1) * (_stride)))
63 #define ZL_REG(_page, _offset, _size) \ argument
64 ZL_REG_IDX(0, _page, _offset, _size, 1, 0)
/linux/tools/testing/selftests/vfio/lib/include/libvfio/
H A Dvfio_pci_device.h49 #define vfio_pci_config_read(_device, _offset, _type) ({ \ argument
51 vfio_pci_config_access((_device), false, _offset, sizeof(__data), &__data); \
59 #define vfio_pci_config_write(_device, _offset, _value, _type) do { \ argument
61 vfio_pci_config_access((_device), true, _offset, sizeof(_type), &__data); \
/linux/drivers/ssb/
H A Dpci.c171 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
172 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
173 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
174 out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
175 in[SPOFF(_offset)]) & (_mask)) >> (_shift))
176 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
177 SPEX16(_outvar, _offset, _mask, _shift)
179 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
181 SPEX(_field[0], _offset + 0, _mask, _shift); \
182 SPEX(_field[1], _offset + 2, _mask, _shift); \
[all …]
/linux/tools/testing/selftests/powerpc/nx-gzip/include/
H A Dnxu.h428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \
430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \
438 << (31-REG##_offset)))
442 << (31-REG##_offset)))
453 & REG##_mask) << (31-REG##_offset))))
455 | (((X) & REG##_mask) << (31-REG##_offset))))

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