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Searched refs:_MASKED_BIT_DISABLE (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
H A Dreg.h96 ((_val) & _MASKED_BIT_DISABLE(_b))
H A Dhandlers.c2142 else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()
/linux/drivers/gpu/drm/i915/
H A Di915_reg_defs.h119 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0)) macro
H A Di915_perf.c2952 _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE)); in gen12_disable_metric_set()
2954 _MASKED_BIT_DISABLE(GEN12_DISABLE_DOP_GATING)); in gen12_disable_metric_set()
H A Dintel_uncore.c136 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_pm.c27 _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); in intel_gsc_idle_msg_enable()
H A Dintel_ring_submission.c277 RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in xcs_resume()
823 *cs++ = _MASKED_BIT_DISABLE( in mi_set_context()
1077 _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE)); in gen6_bsd_submit_request()
H A Dintel_rc6.c770 _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH)); in vlv_residency_raw()
H A Dintel_workarounds.c313 wa_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_masked_dis()
319 wa_mcr_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_mcr_masked_dis()
H A Dintel_reset.c605 _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)); in gen8_engine_reset_cancel()
H A Dintel_engine_cs.c1695 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
H A Dintel_execlists_submission.c2942 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in enable_execlists()
/linux/drivers/gpu/drm/xe/
H A Dxe_eu_stall.c445 write_ptr_reg = _MASKED_BIT_DISABLE(XEHPC_EUSTALL_REPORT_OVERFLOW_DROP); in clear_dropped_eviction_line_bit()
833 _MASKED_BIT_DISABLE(DISABLE_DOP_GATING)); in xe_eu_stall_disable_locked()
H A Dxe_pxp.c316 _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES); in kcr_pxp_set_status()
H A Dxe_hw_engine.c344 _MASKED_BIT_DISABLE(STOP_RING)); in xe_hw_engine_enable_ring()
H A Dxe_oa.c827 _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE)); in xe_oa_disable_metric_set()
829 _MASKED_BIT_DISABLE(DISABLE_DOP_GATING)); in xe_oa_disable_metric_set()
/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp.c70 _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES); in kcr_pxp_set_status()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_irq.c1631 _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE)); in i915gm_irq_cstate_wa_disable()
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_submission.c4419 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in start_engine()