1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H
3 #define ARCH_X86_KVM_REVERSE_CPUID_H
4
5 #include <uapi/asm/kvm.h>
6 #include <asm/cpufeature.h>
7 #include <asm/cpufeatures.h>
8
9 /*
10 * Define a KVM-only feature flag.
11 *
12 * For features that are scattered by cpufeatures.h, __feature_translate() also
13 * needs to be updated to translate the kernel-defined feature into the
14 * KVM-defined feature.
15 *
16 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h,
17 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so
18 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is
19 * needed in this case.
20 */
21 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f))
22
23 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
24 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0)
25 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1)
26 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11)
27
28 /* Intel-defined sub-features, CPUID level 0x00000007:1 (ECX) */
29 #define KVM_X86_FEATURE_MSR_IMM KVM_X86_FEATURE(CPUID_7_1_ECX, 5)
30
31 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
32 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
33 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
34 #define X86_FEATURE_AMX_COMPLEX KVM_X86_FEATURE(CPUID_7_1_EDX, 8)
35 #define X86_FEATURE_AVX_VNNI_INT16 KVM_X86_FEATURE(CPUID_7_1_EDX, 10)
36 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
37 #define X86_FEATURE_AVX10 KVM_X86_FEATURE(CPUID_7_1_EDX, 19)
38
39 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */
40 #define X86_FEATURE_INTEL_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0)
41 #define X86_FEATURE_IPRED_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 1)
42 #define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2)
43 #define X86_FEATURE_DDPD_U KVM_X86_FEATURE(CPUID_7_2_EDX, 3)
44 #define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4)
45 #define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5)
46
47 /*
48 * Intel-defined sub-features, CPUID level 0x0000001E:1 (EAX). Note, several
49 * of the bits are aliases to features of the same name that are enumerated via
50 * various CPUID.0x7 sub-leafs.
51 */
52 #define X86_FEATURE_AMX_INT8_ALIAS KVM_X86_FEATURE(CPUID_1E_1_EAX, 0)
53 #define X86_FEATURE_AMX_BF16_ALIAS KVM_X86_FEATURE(CPUID_1E_1_EAX, 1)
54 #define X86_FEATURE_AMX_COMPLEX_ALIAS KVM_X86_FEATURE(CPUID_1E_1_EAX, 2)
55 #define X86_FEATURE_AMX_FP16_ALIAS KVM_X86_FEATURE(CPUID_1E_1_EAX, 3)
56 #define X86_FEATURE_AMX_FP8 KVM_X86_FEATURE(CPUID_1E_1_EAX, 4)
57 #define X86_FEATURE_AMX_TF32 KVM_X86_FEATURE(CPUID_1E_1_EAX, 6)
58 #define X86_FEATURE_AMX_AVX512 KVM_X86_FEATURE(CPUID_1E_1_EAX, 7)
59 #define X86_FEATURE_AMX_MOVRS KVM_X86_FEATURE(CPUID_1E_1_EAX, 8)
60
61 /* Intel-defined sub-features, CPUID level 0x00000024:0 (EBX) */
62 #define X86_FEATURE_AVX10_128 KVM_X86_FEATURE(CPUID_24_0_EBX, 16)
63 #define X86_FEATURE_AVX10_256 KVM_X86_FEATURE(CPUID_24_0_EBX, 17)
64 #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18)
65
66 /* Intel-defined sub-features, CPUID level 0x00000024:1 (ECX) */
67 #define X86_FEATURE_AVX10_VNNI_INT KVM_X86_FEATURE(CPUID_24_1_ECX, 2)
68
69 /* CPUID level 0x80000007 (EDX). */
70 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8)
71
72 /* CPUID level 0x80000022 (EAX) */
73 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
74
75 /* CPUID level 0x80000021 (ECX) */
76 #define KVM_X86_FEATURE_TSA_SQ_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
77 #define KVM_X86_FEATURE_TSA_L1_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
78
79 struct cpuid_reg {
80 u32 function;
81 u32 index;
82 int reg;
83 };
84
85 static const struct cpuid_reg reverse_cpuid[] = {
86 [CPUID_1_EDX] = { 1, 0, CPUID_EDX},
87 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
88 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
89 [CPUID_1_ECX] = { 1, 0, CPUID_ECX},
90 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
91 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
92 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX},
93 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX},
94 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
95 [CPUID_6_EAX] = { 6, 0, CPUID_EAX},
96 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
97 [CPUID_7_ECX] = { 7, 0, CPUID_ECX},
98 [CPUID_7_EDX] = { 7, 0, CPUID_EDX},
99 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX},
100 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX},
101 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
102 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX},
103 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX},
104 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
105 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
106 [CPUID_7_2_EDX] = { 7, 2, CPUID_EDX},
107 [CPUID_24_0_EBX] = { 0x24, 0, CPUID_EBX},
108 [CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
109 [CPUID_7_1_ECX] = { 7, 1, CPUID_ECX},
110 [CPUID_1E_1_EAX] = { 0x1e, 1, CPUID_EAX},
111 [CPUID_24_1_ECX] = { 0x24, 1, CPUID_ECX},
112 };
113
114 /*
115 * Reverse CPUID and its derivatives can only be used for hardware-defined
116 * feature words, i.e. words whose bits directly correspond to a CPUID leaf.
117 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word
118 * is nonsensical as the bit number/mask is an arbitrary software-defined value
119 * and can't be used by KVM to query/control guest capabilities. And obviously
120 * the leaf being queried must have an entry in the lookup table.
121 */
reverse_cpuid_check(unsigned int x86_leaf)122 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
123 {
124 BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS);
125 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
126 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
127 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
128 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
129 BUILD_BUG_ON(x86_leaf == CPUID_LNX_5);
130 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
131 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
132 }
133
134 /*
135 * Translate feature bits that are scattered in the kernel's cpufeatures word
136 * into KVM feature words that align with hardware's definitions.
137 */
__feature_translate(int x86_feature)138 static __always_inline u32 __feature_translate(int x86_feature)
139 {
140 #define KVM_X86_TRANSLATE_FEATURE(f) \
141 case X86_FEATURE_##f: return KVM_X86_FEATURE_##f
142
143 switch (x86_feature) {
144 KVM_X86_TRANSLATE_FEATURE(SGX1);
145 KVM_X86_TRANSLATE_FEATURE(SGX2);
146 KVM_X86_TRANSLATE_FEATURE(SGX_EDECCSSA);
147 KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC);
148 KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
149 KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
150 KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
151 KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
152 KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
153 KVM_X86_TRANSLATE_FEATURE(MSR_IMM);
154 default:
155 return x86_feature;
156 }
157 }
158
__feature_leaf(int x86_feature)159 static __always_inline u32 __feature_leaf(int x86_feature)
160 {
161 u32 x86_leaf = __feature_translate(x86_feature) / 32;
162
163 reverse_cpuid_check(x86_leaf);
164 return x86_leaf;
165 }
166
167 /*
168 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain
169 * the hardware defined bit number (stored in bits 4:0) and a software defined
170 * "word" (stored in bits 31:5). The word is used to index into arrays of
171 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
172 */
__feature_bit(int x86_feature)173 static __always_inline u32 __feature_bit(int x86_feature)
174 {
175 x86_feature = __feature_translate(x86_feature);
176
177 reverse_cpuid_check(x86_feature / 32);
178 return 1 << (x86_feature & 31);
179 }
180
181 #define feature_bit(name) __feature_bit(X86_FEATURE_##name)
182
x86_feature_cpuid(unsigned int x86_feature)183 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
184 {
185 unsigned int x86_leaf = __feature_leaf(x86_feature);
186
187 return reverse_cpuid[x86_leaf];
188 }
189
__cpuid_entry_get_reg(struct kvm_cpuid_entry2 * entry,u32 reg)190 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
191 u32 reg)
192 {
193 switch (reg) {
194 case CPUID_EAX:
195 return &entry->eax;
196 case CPUID_EBX:
197 return &entry->ebx;
198 case CPUID_ECX:
199 return &entry->ecx;
200 case CPUID_EDX:
201 return &entry->edx;
202 default:
203 BUILD_BUG();
204 return NULL;
205 }
206 }
207
cpuid_entry_get_reg(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)208 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
209 unsigned int x86_feature)
210 {
211 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
212
213 return __cpuid_entry_get_reg(entry, cpuid.reg);
214 }
215
cpuid_entry_get(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)216 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
217 unsigned int x86_feature)
218 {
219 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
220
221 return *reg & __feature_bit(x86_feature);
222 }
223
cpuid_entry_has(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)224 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
225 unsigned int x86_feature)
226 {
227 return cpuid_entry_get(entry, x86_feature);
228 }
229
cpuid_entry_clear(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)230 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
231 unsigned int x86_feature)
232 {
233 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
234
235 *reg &= ~__feature_bit(x86_feature);
236 }
237
cpuid_entry_set(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature)238 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
239 unsigned int x86_feature)
240 {
241 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
242
243 *reg |= __feature_bit(x86_feature);
244 }
245
cpuid_entry_change(struct kvm_cpuid_entry2 * entry,unsigned int x86_feature,bool set)246 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
247 unsigned int x86_feature,
248 bool set)
249 {
250 u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
251
252 /*
253 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the
254 * compiler into using CMOV instead of Jcc when possible.
255 */
256 if (set)
257 *reg |= __feature_bit(x86_feature);
258 else
259 *reg &= ~__feature_bit(x86_feature);
260 }
261
262 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */
263