Home
last modified time | relevance | path

Searched refs:VECSIZE (Results 1 – 5 of 5) sorted by relevance

/linux/arch/loongarch/include/asm/
H A Dsetup.h14 #define VECSIZE 0x200 macro
19 extern long exception_handlers[VECSIZE * 128 / sizeof(long)];
/linux/arch/loongarch/kernel/
H A Dtraps.c1134 long exception_handlers[VECSIZE * 128 / sizeof(long)] __aligned(SZ_64K);
1139 tlbrentry = (unsigned long)exception_handlers + 80*VECSIZE; in configure_exception_vector()
1150 setup_vint_size(VECSIZE); in per_cpu_trap_init()
1165 set_handler(i * VECSIZE, handle_reserved, VECSIZE); in per_cpu_trap_init()
1202 set_handler(i * VECSIZE, handle_vint, VECSIZE); in trap_init()
1206 set_handler(i * VECSIZE, exception_table[i], VECSIZE); in trap_init()
H A Dunwind_prologue.c31 if (entry_offset >= EXCCODE_INT_START * VECSIZE) in scan_handlers()
34 idx = entry_offset / VECSIZE; in scan_handlers()
35 offset = entry_offset % VECSIZE; in scan_handlers()
H A Dunwind_orc.c369 if (ra >= eentry && ra < eentry + EXCCODE_INT_END * VECSIZE) { in bt_address()
371 unsigned long type = (ra - eentry) / VECSIZE; in bt_address()
372 unsigned long offset = (ra - eentry) % VECSIZE; in bt_address()
/linux/arch/loongarch/mm/
H A Dtlb.c284 set_handler(i * VECSIZE, exception_table[i], VECSIZE); in setup_tlb_handler()
309 csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY); in setup_tlb_handler()