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Searched refs:VDBOX_CGCTL3F1C (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/xe/
H A Dxe_wa.c212 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
231 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
259 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
280 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
298 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
/linux/drivers/gpu/drm/xe/regs/
H A Dxe_engine_regs.h223 #define VDBOX_CGCTL3F1C(base) XE_REG((base) + 0x3f1c) macro
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_regs.h266 #define VDBOX_CGCTL3F1C(base) _MMIO((base) + 0x3f1c) macro
H A Dintel_workarounds.c1620 wa_write_or(wal, VDBOX_CGCTL3F1C(engine->mmio_base), in wa_16021867713()