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Searched refs:VC4_REG32 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/vc4/
H A Dvc4_v3d.c19 VC4_REG32(V3D_IDENT0),
20 VC4_REG32(V3D_IDENT1),
21 VC4_REG32(V3D_IDENT2),
22 VC4_REG32(V3D_SCRATCH),
23 VC4_REG32(V3D_L2CACTL),
24 VC4_REG32(V3D_SLCACTL),
25 VC4_REG32(V3D_INTCTL),
26 VC4_REG32(V3D_INTENA),
27 VC4_REG32(V3D_INTDIS),
28 VC4_REG32(V3D_CT0CS),
[all …]
H A Dvc4_hvs.c38 VC4_REG32(SCALER_DISPCTRL),
39 VC4_REG32(SCALER_DISPSTAT),
40 VC4_REG32(SCALER_DISPID),
41 VC4_REG32(SCALER_DISPECTRL),
42 VC4_REG32(SCALER_DISPPROF),
43 VC4_REG32(SCALER_DISPDITHER),
44 VC4_REG32(SCALER_DISPEOLN),
45 VC4_REG32(SCALER_DISPLIST0),
46 VC4_REG32(SCALER_DISPLIST1),
47 VC4_REG32(SCALER_DISPLIST2),
[all …]
H A Dvc4_vec.c250 VC4_REG32(VEC_WSE_CONTROL),
251 VC4_REG32(VEC_WSE_WSS_DATA),
252 VC4_REG32(VEC_WSE_VPS_DATA1),
253 VC4_REG32(VEC_WSE_VPS_CONTROL),
254 VC4_REG32(VEC_REVID),
255 VC4_REG32(VEC_CONFIG0),
256 VC4_REG32(VEC_SCHPH),
257 VC4_REG32(VEC_CLMP0_START),
258 VC4_REG32(VEC_CLMP0_END),
259 VC4_REG32(VEC_FREQ3_2),
[all …]
H A Dvc4_dsi.c665 VC4_REG32(DSI0_CTRL),
666 VC4_REG32(DSI0_STAT),
667 VC4_REG32(DSI0_HSTX_TO_CNT),
668 VC4_REG32(DSI0_LPRX_TO_CNT),
669 VC4_REG32(DSI0_TA_TO_CNT),
670 VC4_REG32(DSI0_PR_TO_CNT),
671 VC4_REG32(DSI0_DISP0_CTRL),
672 VC4_REG32(DSI0_DISP1_CTRL),
673 VC4_REG32(DSI0_INT_STAT),
674 VC4_REG32(DSI0_INT_EN),
[all …]
H A Dvc4_crtc.c67 VC4_REG32(PV_CONTROL),
68 VC4_REG32(PV_V_CONTROL),
69 VC4_REG32(PV_VSYNCD_EVEN),
70 VC4_REG32(PV_HORZA),
71 VC4_REG32(PV_HORZB),
72 VC4_REG32(PV_VERTA),
73 VC4_REG32(PV_VERTB),
74 VC4_REG32(PV_VERTA_EVEN),
75 VC4_REG32(PV_VERTB_EVEN),
76 VC4_REG32(PV_INTEN),
[all …]
H A Dvc4_txp.c183 VC4_REG32(TXP_DST_PTR),
184 VC4_REG32(TXP_DST_PITCH),
185 VC4_REG32(TXP_DIM),
186 VC4_REG32(TXP_DST_CTRL),
187 VC4_REG32(TXP_PROGRESS),
H A Dvc4_dpi.c117 VC4_REG32(DPI_C),
118 VC4_REG32(DPI_ID),
H A Dvc4_drv.h669 #define VC4_REG32(reg) { .name = #reg, .offset = reg } macro