Home
last modified time | relevance | path

Searched refs:USRRetrainingLatencyMargin (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.c4303 double USRRetrainingLatencyMargin[DC__NUM_DPP__MAX]; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() local
4464 …USRRetrainingLatencyMargin[k] = ActiveClockChangeLatencyHiding - v->Watermark.USRRetrainingWaterma… in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4545 (USRRetrainingLatencyMargin[k] < 0)) { in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h1753 dml_float_t USRRetrainingLatencyMargin[__DML_NUM_PLANES__]; member
H A Ddisplay_mode_core.c2942 …s->USRRetrainingLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->USRRetraining… in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2962 …teChange[k] != dml_use_mall_pstate_change_phantom_pipe) && (s->USRRetrainingLatencyMargin[k] < 0))… in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c6838 …s->USRRetrainingLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->USRRetraining… in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()