Searched refs:UB9702_IR_CSI_ANA_CSIPLL_REG_1 (Results 1 – 1 of 1) sorted by relevance
440 #define UB9702_IR_CSI_ANA_CSIPLL_REG_1 0x92 macro2346 UB9702_IR_CSI_ANA_CSIPLL_REG_1, ana_pll_div, &ret); in ub960_init_tx_ports_ub9702()