Searched refs:TRCSEQEVRn (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-cfg-afdo.c | 83 .offset = TRCSEQEVRn(0),
89 .offset = TRCSEQEVRn(1),
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| H A D | coresight-etm4x.h | 47 #define TRCSEQEVRn(n) (0x100 + (n * 4)) /* n = 0-2 */ macro
335 CASE_##op((val), TRCSEQEVRn(0)) \
336 CASE_##op((val), TRCSEQEVRn(1)) \
337 CASE_##op((val), TRCSEQEVRn(2)) \
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| H A D | coresight-etm4x-cfg.c | 76 } else if ((offset & GENMASK(11, 4)) == TRCSEQEVRn(0)) { in etm4_cfg_map_reg_offset()
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| H A D | coresight-etm4x-core.c | 548 etm4x_relaxed_write32(csa, config->seq_ctrl[i], TRCSEQEVRn(i)); in etm4_enable_hw()
1931 state->trcseqevr[i] = etm4x_read32(csa, TRCSEQEVRn(i)); in __etm4_cpu_save()
2062 etm4x_relaxed_write32(csa, state->trcseqevr[i], TRCSEQEVRn(i)); in __etm4_cpu_restore()
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