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Searched refs:TRCCNTVRn (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/hwtracing/coresight/
H A Dcoresight-cfg-afdo.c47 .offset = TRCCNTVRn(0),
65 .offset = TRCCNTVRn(1),
H A Dcoresight-etm4x-cfg.c118 (offset <= TRCCNTVRn((ETMv4_MAX_CNTR - 1)))) { in etm4_cfg_map_reg_offset()
125 CHECKREGIDX(TRCCNTVRn(0), cntr_val, idx, off_mask); in etm4_cfg_map_reg_offset()
H A Dcoresight-etm4x.h54 #define TRCCNTVRn(n) (0x160 + (n * 4)) /* n = 0-3 */ macro
349 CASE_##op((val), TRCCNTVRn(0)) \
350 CASE_##op((val), TRCCNTVRn(1)) \
351 CASE_##op((val), TRCCNTVRn(2)) \
352 CASE_##op((val), TRCCNTVRn(3)) \
H A Dcoresight-etm4x-core.c558 etm4x_relaxed_write32(csa, config->cntr_val[i], TRCCNTVRn(i)); in etm4_enable_hw()
1057 etm4x_relaxed_read32(csa, TRCCNTVRn(i)); in etm4_disable_hw()
1944 state->trccntvr[i] = etm4x_read32(csa, TRCCNTVRn(i)); in __etm4_cpu_save()
2074 etm4x_relaxed_write32(csa, state->trccntvr[i], TRCCNTVRn(i)); in __etm4_cpu_restore()
/linux/arch/arm64/kvm/
H A Demulate-nested.c1698 SR_FGT(SYS_TRCCNTVR(0), HDFGRTR, TRCCNTVRn, 1),
1699 SR_FGT(SYS_TRCCNTVR(1), HDFGRTR, TRCCNTVRn, 1),
1700 SR_FGT(SYS_TRCCNTVR(2), HDFGRTR, TRCCNTVRn, 1),
1701 SR_FGT(SYS_TRCCNTVR(3), HDFGRTR, TRCCNTVRn, 1),
/linux/arch/arm64/tools/
H A Dsysreg4253 Field 37 TRCCNTVRn
4316 Field 37 TRCCNTVRn