Home
last modified time | relevance | path

Searched refs:TO_CYCLES64 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Drenesas-nand-controller.c191 #define TO_CYCLES64(ps, period_ns) ((unsigned int)DIV_ROUND_UP_ULL(div_u64(ps, 1000), \ macro
917 TIMINGS_ASYN_TRWP(TO_CYCLES64(sdr->tRP_min, period_ns)) | in rnandc_setup_interface()
918 TIMINGS_ASYN_TRWH(TO_CYCLES64(sdr->tREH_min, period_ns)); in rnandc_setup_interface()
920 TIM_SEQ0_TCCS(TO_CYCLES64(sdr->tCCS_min, period_ns)) | in rnandc_setup_interface()
921 TIM_SEQ0_TADL(TO_CYCLES64(sdr->tADL_min, period_ns)) | in rnandc_setup_interface()
922 TIM_SEQ0_TRHW(TO_CYCLES64(sdr->tRHW_min, period_ns)) | in rnandc_setup_interface()
923 TIM_SEQ0_TWHR(TO_CYCLES64(sdr->tWHR_min, period_ns)); in rnandc_setup_interface()
925 TIM_SEQ1_TWB(TO_CYCLES64(sdr->tWB_max, period_ns)) | in rnandc_setup_interface()
926 TIM_SEQ1_TRR(TO_CYCLES64(sdr->tRR_min, period_ns)) | in rnandc_setup_interface()
927 TIM_SEQ1_TWW(TO_CYCLES64(sdr->tWW_min, period_ns)); in rnandc_setup_interface()
[all …]
H A Dmarvell_nand.c474 #define TO_CYCLES64(ps, period_ns) (DIV_ROUND_UP_ULL(div_u64(ps, 1000), \ macro
2451 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_interface()