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Searched refs:TIMER1 (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arc/boot/dts/
H A Dskeleton.dtsi38 /* TIMER1 for free running clocksource */
H A Dskeleton_hs.dtsi39 /* TIMER1 for free running clocksource: Fallback if rtc not found */
H A Dabilis_tb10x.dtsi34 /* TIMER1 for free running clocksource */
/linux/drivers/pinctrl/
H A Dpinctrl-lpc18xx.c297 LPC_P(5,0, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
298 LPC_P(5,1, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
299 LPC_P(5,2, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
300 LPC_P(5,3, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
301 LPC_P(5,4, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
302 LPC_P(5,5, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
303 LPC_P(5,6, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
304 LPC_P(5,7, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
/linux/drivers/clocksource/
H A DKconfig198 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
199 where TIMER0 serves as clockevent and TIMER1 serves as clocksource.
308 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
310 TIMER0 serves as clockevent while TIMER1 provides clocksource.
/linux/arch/arm/boot/dts/arm/
H A Dintegratorcp.dts155 /* TIMER1 runs @ 1MHz */
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dreg.h225 #define TIMER1 0x02E8 macro