Searched refs:S32G_SWT_CR (Results 1 – 1 of 1) sorted by relevance
20 #define S32G_SWT_CR(__base) ((__base) + 0x00) /* Control Register offset */ macro88 val = readl(S32G_SWT_CR(wdev->base)); in s32g_wdt_start()92 writel(val, S32G_SWT_CR(wdev->base)); in s32g_wdt_start()102 val = readl(S32G_SWT_CR(wdev->base)); in s32g_wdt_stop()106 writel(val, S32G_SWT_CR(wdev->base)); in s32g_wdt_stop()179 val = readl(S32G_SWT_CR(wdev->base)); in s32g_wdt_init()202 writel(val, S32G_SWT_CR(wdev->base)); in s32g_wdt_init()