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Searched refs:Reset (Results 1 – 25 of 296) sorted by relevance

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/linux/drivers/reset/
H A DKconfig6 bool "Reset Controller Support"
9 Generic Reset Controller support.
19 tristate "Altera Arria10 System Resource Reset"
26 tristate "ASPEED Reset Driver"
33 bool "AR71xx Reset Driver" if COMPILE_TEST
40 bool "AXS10x Reset Driver" if COMPILE_TEST
46 bool "BCM6345 Reset Controller"
53 tristate "Berlin Reset Driver"
77 bool "Reset controller driver for ESWIN SoCs"
111 bool "Synopsys HSDK Reset Driver"
[all …]
/linux/Documentation/hwmon/
H A Dltc3815.rst44 in1_reset_history Reset input voltage history.
50 in2_reset_history Reset output voltage history.
55 temp1_reset_history Reset temperature history.
60 curr1_reset_history Reset input current history.
66 curr2_reset_history Reset output current history.
H A Dsg2042-mcu.rst51 reset_count RO Reset count of the SoC
53 reset_reason RO Reset reason for the last reset
H A Dltc2978.rst317 in1_reset_history Reset input voltage history.
356 in[N]_reset_history Reset output voltage history.
411 temp[N]_reset_history Reset temperature history.
449 curr1_reset_history Reset input current history.
490 curr[N]_reset_history Reset output current history.
/linux/Documentation/driver-api/
H A Dreset.rst4 Reset controller API
10 Reset controllers are central units that control the reset signals to multiple
29 Reset line
34 Reset control
44 Reset controller
49 Reset consumer
146 Reset control arrays
155 Reset controller driver interface
178 Reset consumer API
181 Reset consumers can control a reset line using an opaque reset control handle,
[all …]
/linux/drivers/reset/amlogic/
H A DKconfig6 tristate "Meson Reset Driver"
15 tristate "Meson Reset Auxiliary Driver"
23 tristate "Meson Audio Memory Arbiter Reset Driver"
/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt1 Xilinx Zynq Reset Manager
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
24 Reset outputs:
H A Dti-syscon-reset.txt1 TI SysCon Reset Controller
12 A SysCon Reset Controller node defines a device that uses a syscon node
16 SysCon Reset Controller Node
49 SysCon Reset Consumer Nodes
H A Dreset.txt1 = Reset Signal Device Tree Bindings =
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
32 = Reset providers =
45 = Reset consumers =
H A Dst,stm32-rcc.txt1 STMicroelectronics STM32 Peripheral Reset Controller
H A Dst,stm32mp1-rcc.txt1 STMicroelectronics STM32MP1 Peripheral Reset Controller
/linux/drivers/reset/hisilicon/
H A DKconfig3 tristate "Hi3660 Reset Driver"
10 tristate "Hi6220 Reset Driver"
/linux/drivers/reset/starfive/
H A DKconfig7 bool "StarFive JH7100 Reset Driver"
15 bool "StarFive JH7110 Reset Driver"
/linux/drivers/acpi/arm64/
H A DKconfig13 bool "Arm Generic Diagnostic Dump and Reset Device Interface"
16 Arm Generic Diagnostic Dump and Reset Device Interface (AGDI) is
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-resolver-ad2s12105 Reading returns the current Degradation of Signal Reset Maximum
19 Reading returns the current Degradation of Signal Reset Minimum
H A Dsysfs-bus-usb-lvstest32 Write to this node to issue "Reset" for Link Layer Validation
58 Write to this node to issue "Warm Reset" for Link Layer Validation
H A Dsysfs-bus-papr-pmem48 * "CtlResCt" : Controller Reset Count
49 * "CtlResTm" : Controller Reset Elapsed Time
/linux/drivers/platform/mips/
H A DKconfig35 bool "Loongson-2K1000 Reset Controller"
38 Loongson-2K1000 Reset Controller driver.
/linux/init/
H A Dinitramfs.c225 Reset enumerator
364 next_state = Reset; in do_name()
450 next_state = Reset; in do_symlink()
462 [Reset] = do_reset,
491 state = Reset; in flush_buffer()
561 if (state != Reset) in unpack_to_rootfs()
/linux/Documentation/driver-api/mmc/
H A Dmmc-tools.rst26 - Permanently enable the eMMC H/W Reset feature.
27 - Permanently disable the eMMC H/W Reset feature.
/linux/Documentation/devicetree/bindings/mfd/
H A Daltera-a10sr.txt20 a10sr_rst Reset Controller
30 Arria10 Peripheral PHY Reset
/linux/Documentation/devicetree/bindings/power/reset/
H A Dkeystone-reset.txt7 SoC. Each watchdog timer event input is connected to the Reset Mux
8 block. The Reset Mux block can be configured to cause reset or not.
/linux/drivers/reset/tegra/
H A DKconfig3 bool "Tegra BPMP Reset Driver" if COMPILE_TEST
/linux/drivers/reset/sti/
H A DKconfig5 bool "STIH407 Reset Driver" if COMPILE_TEST
/linux/Documentation/PCI/
H A Dpci-error-recovery.rst171 then recovery proceeds to STEP 4 (Slot Reset).
209 instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset).
221 Reset). Hence devices in the sub-hierarchy are inaccessible until
222 STEP 4 (Slot Reset).
225 may not even be accessible in STEP 4 (Slot Reset). Drivers can detect
262 proceeds to either STEP 3 (Link Reset) or to STEP 5 (Resume Operations).
265 proceeds to STEP 4 (Slot Reset)
267 STEP 3: Link Reset
273 STEP 4: Slot Reset

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