Searched refs:RVC_RS2S (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/riscv/kernel/ |
| H A D | traps_misaligned.c | 126 #define GET_F64_RS2S(insn, regs) (get_f64_rs(RVC_RS2S(insn), 0, regs))
130 #define GET_F32_RS2S(insn, regs) (get_f32_rs(RVC_RS2S(insn), 0, regs))
268 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
277 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
285 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
293 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
300 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
304 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
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| /linux/arch/riscv/kvm/ |
| H A D | vcpu_insn.c | 435 insn = RVC_RS2S(insn) << SH_RD; in kvm_riscv_vcpu_mmio_load()
444 insn = RVC_RS2S(insn) << SH_RD; in kvm_riscv_vcpu_mmio_load()
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| /linux/arch/riscv/include/asm/ |
| H A D | insn.h | 409 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
453 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) macro
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