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Searched refs:RS1 (Results 1 – 9 of 9) sorted by relevance

/linux/arch/sparc/include/asm/
H A Dopcodes.h11 #define RS1(x) (FPD_ENCODE(x) << 14) macro
19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c));
31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d));
33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d));
35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d));
37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d));
39 .word (F3F(2, 0x19, 4)|RS1(a)|RS2(b)|RS3(c)|RD(d));
41 .word (F3F(2, 0x19, 5)|RS1(a)|RS2(b)|RS3(c)|RD(d));
43 .word (F3F(2, 0x19, 6)|RS1(a)|RS2(b)|RS3(c)|RD(d));
45 .word (F3F(2, 0x19, 7)|RS1(a)|RS2(b)|RS3(c)|RD(d));
[all …]
/linux/arch/riscv/include/asm/
H A Dinsn-def.h189 __RD(0), RS1(vaddr), RS2(asid))
193 __RD(0), RS1(gaddr), RS2(vmid))
197 RD(dest), RS1(addr), __RS2(3))
201 RD(dest), RS1(addr), __RS2(0))
206 RD(dest), RS1(addr), __RS2(0))
214 RD(dest), RS1(addr), __RS2(0))
218 RD(dest), RS1(addr), __RS2(0))
222 RD(dest), RS1(addr), __RS2(0))
226 RD(dest), RS1(addr), __RS2(0))
230 RD(dest), RS1(addr), __RS2(0))
[all …]
/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c26 #define RS1(X) ((X) << 14) macro
71 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
118 *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
123 *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
161 _insn |= RS1(r_A) | RD(r_A); \
175 *prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST); \
184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
190 *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \
[all …]
H A Dbpf_jit_comp_64.c55 #define RS1(X) ((X) << 14) macro
139 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
263 emit(OR | RS1(G0) | RS2(from) | RD(to), ctx); in emit_reg_move()
284 emit(XOR | IMMED | RS1(reg) | S13(lbits) | RD(reg), ctx); in emit_set_const_sext()
290 emit(opcode | RS1(dst) | RS2(src) | RD(dst), ctx); in emit_alu()
295 emit(opcode | RS1(a) | RS2(b) | RD(c), ctx); in emit_alu3()
304 insn |= RS1(dst) | RD(dst); in emit_alu_K()
323 insn |= RS1(src) | RD(dst); in emit_alu3_K()
340 emit(OR | IMMED | RS1(G0) | S13(K) | RD(dest), ctx); in emit_loadimm32()
350 emit(OR | IMMED | RS1(G0) | S13(K) | RD(dest), ctx); in emit_loadimm()
[all …]
/linux/arch/sparc/kernel/
H A Dvisemul.c136 #define RS1(INSN) (((INSN) >> 14) & 0x1f) macro
299 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in edge()
300 orig_rs1 = rs1 = fetch_reg(RS1(insn), regs); in edge()
377 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in array()
378 rs1 = fetch_reg(RS1(insn), regs); in array()
410 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in bmask()
411 rs1 = fetch_reg(RS1(insn), regs); in bmask()
430 rs1 = fpd_regval(f, RS1(insn)); in bshuffle()
454 rs1 = fpd_regval(f, RS1(insn)); in pdist()
510 rs1 = fpd_regval(f, RS1(insn)); in pformat()
[all …]
/linux/arch/arm/include/debug/
H A Dvexpress.S28 @ - all other (RS1 complaint) tiles use UART mapped
40 @ RS1 memory map
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2m-rs1.dtsi10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
H A Dvexpress-v2m.dtsi14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
/linux/arch/arm/
H A DKconfig.debug1289 the motherboard's memory map variant (original or RS1) and then
1304 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
1309 of the tiles using the RS1 memory map, including all new A-class