1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Register definitions for Rockchip's RK808/RK818 PMIC 4 * 5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd 6 * 7 * Author: Chris Zhong <zyw@rock-chips.com> 8 * Author: Zhang Qing <zhangqing@rock-chips.com> 9 * 10 * Copyright (C) 2016 PHYTEC Messtechnik GmbH 11 * 12 * Author: Wadim Egorov <w.egorov@phytec.de> 13 */ 14 15 #ifndef __LINUX_REGULATOR_RK808_H 16 #define __LINUX_REGULATOR_RK808_H 17 18 #include <linux/regulator/machine.h> 19 #include <linux/regmap.h> 20 21 /* 22 * rk808 Global Register Map. 23 */ 24 25 #define RK808_DCDC1 0 /* (0+RK808_START) */ 26 #define RK808_LDO1 4 /* (4+RK808_START) */ 27 #define RK808_NUM_REGULATORS 14 28 29 enum rk808_reg { 30 RK808_ID_DCDC1, 31 RK808_ID_DCDC2, 32 RK808_ID_DCDC3, 33 RK808_ID_DCDC4, 34 RK808_ID_LDO1, 35 RK808_ID_LDO2, 36 RK808_ID_LDO3, 37 RK808_ID_LDO4, 38 RK808_ID_LDO5, 39 RK808_ID_LDO6, 40 RK808_ID_LDO7, 41 RK808_ID_LDO8, 42 RK808_ID_SWITCH1, 43 RK808_ID_SWITCH2, 44 }; 45 46 #define RK808_SECONDS_REG 0x00 47 #define RK808_MINUTES_REG 0x01 48 #define RK808_HOURS_REG 0x02 49 #define RK808_DAYS_REG 0x03 50 #define RK808_MONTHS_REG 0x04 51 #define RK808_YEARS_REG 0x05 52 #define RK808_WEEKS_REG 0x06 53 #define RK808_ALARM_SECONDS_REG 0x08 54 #define RK808_ALARM_MINUTES_REG 0x09 55 #define RK808_ALARM_HOURS_REG 0x0a 56 #define RK808_ALARM_DAYS_REG 0x0b 57 #define RK808_ALARM_MONTHS_REG 0x0c 58 #define RK808_ALARM_YEARS_REG 0x0d 59 #define RK808_RTC_CTRL_REG 0x10 60 #define RK808_RTC_STATUS_REG 0x11 61 #define RK808_RTC_INT_REG 0x12 62 #define RK808_RTC_COMP_LSB_REG 0x13 63 #define RK808_RTC_COMP_MSB_REG 0x14 64 #define RK808_ID_MSB 0x17 65 #define RK808_ID_LSB 0x18 66 #define RK808_CLK32OUT_REG 0x20 67 #define RK808_VB_MON_REG 0x21 68 #define RK808_THERMAL_REG 0x22 69 #define RK808_DCDC_EN_REG 0x23 70 #define RK808_LDO_EN_REG 0x24 71 #define RK808_SLEEP_SET_OFF_REG1 0x25 72 #define RK808_SLEEP_SET_OFF_REG2 0x26 73 #define RK808_DCDC_UV_STS_REG 0x27 74 #define RK808_DCDC_UV_ACT_REG 0x28 75 #define RK808_LDO_UV_STS_REG 0x29 76 #define RK808_LDO_UV_ACT_REG 0x2a 77 #define RK808_DCDC_PG_REG 0x2b 78 #define RK808_LDO_PG_REG 0x2c 79 #define RK808_VOUT_MON_TDB_REG 0x2d 80 #define RK808_BUCK1_CONFIG_REG 0x2e 81 #define RK808_BUCK1_ON_VSEL_REG 0x2f 82 #define RK808_BUCK1_SLP_VSEL_REG 0x30 83 #define RK808_BUCK1_DVS_VSEL_REG 0x31 84 #define RK808_BUCK2_CONFIG_REG 0x32 85 #define RK808_BUCK2_ON_VSEL_REG 0x33 86 #define RK808_BUCK2_SLP_VSEL_REG 0x34 87 #define RK808_BUCK2_DVS_VSEL_REG 0x35 88 #define RK808_BUCK3_CONFIG_REG 0x36 89 #define RK808_BUCK4_CONFIG_REG 0x37 90 #define RK808_BUCK4_ON_VSEL_REG 0x38 91 #define RK808_BUCK4_SLP_VSEL_REG 0x39 92 #define RK808_BOOST_CONFIG_REG 0x3a 93 #define RK808_LDO1_ON_VSEL_REG 0x3b 94 #define RK808_LDO1_SLP_VSEL_REG 0x3c 95 #define RK808_LDO2_ON_VSEL_REG 0x3d 96 #define RK808_LDO2_SLP_VSEL_REG 0x3e 97 #define RK808_LDO3_ON_VSEL_REG 0x3f 98 #define RK808_LDO3_SLP_VSEL_REG 0x40 99 #define RK808_LDO4_ON_VSEL_REG 0x41 100 #define RK808_LDO4_SLP_VSEL_REG 0x42 101 #define RK808_LDO5_ON_VSEL_REG 0x43 102 #define RK808_LDO5_SLP_VSEL_REG 0x44 103 #define RK808_LDO6_ON_VSEL_REG 0x45 104 #define RK808_LDO6_SLP_VSEL_REG 0x46 105 #define RK808_LDO7_ON_VSEL_REG 0x47 106 #define RK808_LDO7_SLP_VSEL_REG 0x48 107 #define RK808_LDO8_ON_VSEL_REG 0x49 108 #define RK808_LDO8_SLP_VSEL_REG 0x4a 109 #define RK808_DEVCTRL_REG 0x4b 110 #define RK808_INT_STS_REG1 0x4c 111 #define RK808_INT_STS_MSK_REG1 0x4d 112 #define RK808_INT_STS_REG2 0x4e 113 #define RK808_INT_STS_MSK_REG2 0x4f 114 #define RK808_IO_POL_REG 0x50 115 116 /* RK816 */ 117 enum rk816_reg { 118 RK816_ID_DCDC1, 119 RK816_ID_DCDC2, 120 RK816_ID_DCDC3, 121 RK816_ID_DCDC4, 122 RK816_ID_LDO1, 123 RK816_ID_LDO2, 124 RK816_ID_LDO3, 125 RK816_ID_LDO4, 126 RK816_ID_LDO5, 127 RK816_ID_LDO6, 128 RK816_ID_BOOST, 129 RK816_ID_OTG_SW, 130 }; 131 132 enum rk816_irqs { 133 /* INT_STS_REG1 */ 134 RK816_IRQ_PWRON_FALL, 135 RK816_IRQ_PWRON_RISE, 136 137 /* INT_STS_REG2 */ 138 RK816_IRQ_VB_LOW, 139 RK816_IRQ_PWRON, 140 RK816_IRQ_PWRON_LP, 141 RK816_IRQ_HOTDIE, 142 RK816_IRQ_RTC_ALARM, 143 RK816_IRQ_RTC_PERIOD, 144 RK816_IRQ_USB_OV, 145 146 /* INT_STS_REG3 */ 147 RK816_IRQ_PLUG_IN, 148 RK816_IRQ_PLUG_OUT, 149 RK816_IRQ_CHG_OK, 150 RK816_IRQ_CHG_TE, 151 RK816_IRQ_CHG_TS, 152 RK816_IRQ_CHG_CVTLIM, 153 RK816_IRQ_DISCHG_ILIM, 154 }; 155 156 /* power channel registers */ 157 #define RK816_DCDC_EN_REG1 0x23 158 159 #define RK816_DCDC_EN_REG2 0x24 160 #define RK816_BOOST_EN BIT(1) 161 #define RK816_OTG_EN BIT(2) 162 #define RK816_BOOST_EN_MSK BIT(5) 163 #define RK816_OTG_EN_MSK BIT(6) 164 #define RK816_BUCK_DVS_CONFIRM BIT(7) 165 166 #define RK816_LDO_EN_REG1 0x27 167 168 #define RK816_LDO_EN_REG2 0x28 169 170 /* interrupt registers and irq definitions */ 171 #define RK816_INT_STS_REG1 0x49 172 #define RK816_INT_STS_MSK_REG1 0x4a 173 #define RK816_INT_STS_PWRON_FALL BIT(5) 174 #define RK816_INT_STS_PWRON_RISE BIT(6) 175 176 #define RK816_INT_STS_REG2 0x4c 177 #define RK816_INT_STS_MSK_REG2 0x4d 178 #define RK816_INT_STS_VB_LOW BIT(1) 179 #define RK816_INT_STS_PWRON BIT(2) 180 #define RK816_INT_STS_PWRON_LP BIT(3) 181 #define RK816_INT_STS_HOTDIE BIT(4) 182 #define RK816_INT_STS_RTC_ALARM BIT(5) 183 #define RK816_INT_STS_RTC_PERIOD BIT(6) 184 #define RK816_INT_STS_USB_OV BIT(7) 185 186 #define RK816_INT_STS_REG3 0x4e 187 #define RK816_INT_STS_MSK_REG3 0x4f 188 #define RK816_INT_STS_PLUG_IN BIT(0) 189 #define RK816_INT_STS_PLUG_OUT BIT(1) 190 #define RK816_INT_STS_CHG_OK BIT(2) 191 #define RK816_INT_STS_CHG_TE BIT(3) 192 #define RK816_INT_STS_CHG_TS BIT(4) 193 #define RK816_INT_STS_CHG_CVTLIM BIT(6) 194 #define RK816_INT_STS_DISCHG_ILIM BIT(7) 195 196 #define RK816_IRQ_STS_OFFSET(x) ((x) - RK816_INT_STS_REG1) 197 #define RK816_IRQ_MSK_OFFSET(x) ((x) - RK816_INT_STS_MSK_REG1) 198 199 /* charger, boost and OTG registers */ 200 #define RK816_OTG_BUCK_LDO_CONFIG_REG 0x2a 201 #define RK816_CHRG_CONFIG_REG 0x2b 202 #define RK816_BOOST_ON_VESL_REG 0x54 203 #define RK816_BOOST_SLP_VSEL_REG 0x55 204 #define RK816_CHRG_BOOST_CONFIG_REG 0x9a 205 #define RK816_SUP_STS_REG 0xa0 206 #define RK816_USB_CTRL_REG 0xa1 207 #define RK816_CHRG_CTRL(x) (0xa3 + (x)) 208 #define RK816_BAT_CTRL_REG 0xa6 209 #define RK816_BAT_HTS_TS_REG 0xa8 210 #define RK816_BAT_LTS_TS_REG 0xa9 211 212 /* adc and fuel gauge registers */ 213 #define RK816_TS_CTRL_REG 0xac 214 #define RK816_ADC_CTRL_REG 0xad 215 #define RK816_GGCON_REG 0xb0 216 #define RK816_GGSTS_REG 0xb1 217 #define RK816_ZERO_CUR_ADC_REGH 0xb2 218 #define RK816_ZERO_CUR_ADC_REGL 0xb3 219 #define RK816_GASCNT_CAL_REG(x) (0xb7 - (x)) 220 #define RK816_GASCNT_REG(x) (0xbb - (x)) 221 #define RK816_BAT_CUR_AVG_REGH 0xbc 222 #define RK816_BAT_CUR_AVG_REGL 0xbd 223 #define RK816_TS_ADC_REGH 0xbe 224 #define RK816_TS_ADC_REGL 0xbf 225 #define RK816_USB_ADC_REGH 0xc0 226 #define RK816_USB_ADC_REGL 0xc1 227 #define RK816_BAT_OCV_REGH 0xc2 228 #define RK816_BAT_OCV_REGL 0xc3 229 #define RK816_BAT_VOL_REGH 0xc4 230 #define RK816_BAT_VOL_REGL 0xc5 231 #define RK816_RELAX_ENTRY_THRES_REGH 0xc6 232 #define RK816_RELAX_ENTRY_THRES_REGL 0xc7 233 #define RK816_RELAX_EXIT_THRES_REGH 0xc8 234 #define RK816_RELAX_EXIT_THRES_REGL 0xc9 235 #define RK816_RELAX_VOL1_REGH 0xca 236 #define RK816_RELAX_VOL1_REGL 0xcb 237 #define RK816_RELAX_VOL2_REGH 0xcc 238 #define RK816_RELAX_VOL2_REGL 0xcd 239 #define RK816_RELAX_CUR1_REGH 0xce 240 #define RK816_RELAX_CUR1_REGL 0xcf 241 #define RK816_RELAX_CUR2_REGH 0xd0 242 #define RK816_RELAX_CUR2_REGL 0xd1 243 #define RK816_CAL_OFFSET_REGH 0xd2 244 #define RK816_CAL_OFFSET_REGL 0xd3 245 #define RK816_NON_ACT_TIMER_CNT_REG 0xd4 246 #define RK816_VCALIB0_REGH 0xd5 247 #define RK816_VCALIB0_REGL 0xd6 248 #define RK816_VCALIB1_REGH 0xd7 249 #define RK816_VCALIB1_REGL 0xd8 250 #define RK816_FCC_GASCNT_REG(x) (0xdc - (x)) 251 #define RK816_IOFFSET_REGH 0xdd 252 #define RK816_IOFFSET_REGL 0xde 253 #define RK816_SLEEP_CON_SAMP_CUR_REG 0xdf 254 255 /* general purpose data registers 0xe0 ~ 0xf2 */ 256 #define RK816_DATA_REG(x) (0xe0 + (x)) 257 258 /* RK818 */ 259 #define RK818_DCDC1 0 260 #define RK818_LDO1 4 261 #define RK818_NUM_REGULATORS 17 262 263 enum rk818_reg { 264 RK818_ID_DCDC1, 265 RK818_ID_DCDC2, 266 RK818_ID_DCDC3, 267 RK818_ID_DCDC4, 268 RK818_ID_BOOST, 269 RK818_ID_LDO1, 270 RK818_ID_LDO2, 271 RK818_ID_LDO3, 272 RK818_ID_LDO4, 273 RK818_ID_LDO5, 274 RK818_ID_LDO6, 275 RK818_ID_LDO7, 276 RK818_ID_LDO8, 277 RK818_ID_LDO9, 278 RK818_ID_SWITCH, 279 RK818_ID_HDMI_SWITCH, 280 RK818_ID_OTG_SWITCH, 281 }; 282 283 #define RK818_DCDC_EN_REG 0x23 284 #define RK818_LDO_EN_REG 0x24 285 #define RK818_SLEEP_SET_OFF_REG1 0x25 286 #define RK818_SLEEP_SET_OFF_REG2 0x26 287 #define RK818_DCDC_UV_STS_REG 0x27 288 #define RK818_DCDC_UV_ACT_REG 0x28 289 #define RK818_LDO_UV_STS_REG 0x29 290 #define RK818_LDO_UV_ACT_REG 0x2a 291 #define RK818_DCDC_PG_REG 0x2b 292 #define RK818_LDO_PG_REG 0x2c 293 #define RK818_VOUT_MON_TDB_REG 0x2d 294 #define RK818_BUCK1_CONFIG_REG 0x2e 295 #define RK818_BUCK1_ON_VSEL_REG 0x2f 296 #define RK818_BUCK1_SLP_VSEL_REG 0x30 297 #define RK818_BUCK2_CONFIG_REG 0x32 298 #define RK818_BUCK2_ON_VSEL_REG 0x33 299 #define RK818_BUCK2_SLP_VSEL_REG 0x34 300 #define RK818_BUCK3_CONFIG_REG 0x36 301 #define RK818_BUCK4_CONFIG_REG 0x37 302 #define RK818_BUCK4_ON_VSEL_REG 0x38 303 #define RK818_BUCK4_SLP_VSEL_REG 0x39 304 #define RK818_BOOST_CONFIG_REG 0x3a 305 #define RK818_LDO1_ON_VSEL_REG 0x3b 306 #define RK818_LDO1_SLP_VSEL_REG 0x3c 307 #define RK818_LDO2_ON_VSEL_REG 0x3d 308 #define RK818_LDO2_SLP_VSEL_REG 0x3e 309 #define RK818_LDO3_ON_VSEL_REG 0x3f 310 #define RK818_LDO3_SLP_VSEL_REG 0x40 311 #define RK818_LDO4_ON_VSEL_REG 0x41 312 #define RK818_LDO4_SLP_VSEL_REG 0x42 313 #define RK818_LDO5_ON_VSEL_REG 0x43 314 #define RK818_LDO5_SLP_VSEL_REG 0x44 315 #define RK818_LDO6_ON_VSEL_REG 0x45 316 #define RK818_LDO6_SLP_VSEL_REG 0x46 317 #define RK818_LDO7_ON_VSEL_REG 0x47 318 #define RK818_LDO7_SLP_VSEL_REG 0x48 319 #define RK818_LDO8_ON_VSEL_REG 0x49 320 #define RK818_LDO8_SLP_VSEL_REG 0x4a 321 #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54 322 #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55 323 #define RK818_DEVCTRL_REG 0x4b 324 #define RK818_INT_STS_REG1 0X4c 325 #define RK818_INT_STS_MSK_REG1 0x4d 326 #define RK818_INT_STS_REG2 0x4e 327 #define RK818_INT_STS_MSK_REG2 0x4f 328 #define RK818_IO_POL_REG 0x50 329 #define RK818_H5V_EN_REG 0x52 330 #define RK818_SLEEP_SET_OFF_REG3 0x53 331 #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54 332 #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55 333 #define RK818_BOOST_CTRL_REG 0x56 334 #define RK818_DCDC_ILMAX 0x90 335 #define RK818_USB_CTRL_REG 0xa1 336 337 #define RK818_H5V_EN BIT(0) 338 #define RK818_REF_RDY_CTRL BIT(1) 339 #define RK818_USB_ILIM_SEL_MASK 0xf 340 #define RK818_USB_ILMIN_2000MA 0x7 341 #define RK818_USB_CHG_SD_VSEL_MASK 0x70 342 343 /* RK801 */ 344 enum rk801_reg { 345 RK801_ID_DCDC1, 346 RK801_ID_DCDC2, 347 RK801_ID_DCDC4, 348 RK801_ID_DCDC3, 349 RK801_ID_LDO1, 350 RK801_ID_LDO2, 351 RK801_ID_SWITCH, 352 RK801_ID_MAX, 353 }; 354 355 #define RK801_SLP_REG_OFFSET 5 356 #define RK801_NUM_REGULATORS 7 357 358 #define RK801_HW_SYNC_US 32 359 360 /* RK801 Register Definitions */ 361 #define RK801_ID_MSB 0x00 362 #define RK801_ID_LSB 0x01 363 #define RK801_OTP_VER_REG 0x02 364 #define RK801_POWER_EN0_REG 0x03 365 #define RK801_POWER_EN1_REG 0x04 366 #define RK801_POWER_SLP_EN_REG 0x05 367 #define RK801_POWER_FPWM_EN_REG 0x06 368 #define RK801_SLP_LP_CONFIG_REG 0x07 369 #define RK801_BUCK_CONFIG_REG 0x08 370 #define RK801_BUCK1_ON_VSEL_REG 0x09 371 #define RK801_BUCK2_ON_VSEL_REG 0x0a 372 #define RK801_BUCK4_ON_VSEL_REG 0x0b 373 #define RK801_LDO1_ON_VSEL_REG 0x0c 374 #define RK801_LDO2_ON_VSEL_REG 0x0d 375 #define RK801_BUCK1_SLP_VSEL_REG 0x0e 376 #define RK801_BUCK2_SLP_VSEL_REG 0x0f 377 #define RK801_BUCK4_SLP_VSEL_REG 0x10 378 #define RK801_LDO1_SLP_VSEL_REG 0x11 379 #define RK801_LDO2_SLP_VSEL_REG 0x12 380 #define RK801_LDO_SW_IMAX_REG 0x13 381 #define RK801_SYS_STS_REG 0x14 382 #define RK801_SYS_CFG0_REG 0x15 383 #define RK801_SYS_CFG1_REG 0x16 384 #define RK801_SYS_CFG2_REG 0x17 385 #define RK801_SYS_CFG3_REG 0x18 386 #define RK801_SYS_CFG4_REG 0x19 387 #define RK801_SLEEP_CFG_REG 0x1a 388 #define RK801_ON_SOURCE_REG 0x1b 389 #define RK801_OFF_SOURCE_REG 0x1c 390 #define RK801_PWRON_KEY_REG 0x1d 391 #define RK801_INT_STS0_REG 0x1e 392 #define RK801_INT_MASK0_REG 0x1f 393 #define RK801_INT_CONFIG_REG 0x20 394 #define RK801_CON_BACK1_REG 0x21 395 #define RK801_CON_BACK2_REG 0x22 396 #define RK801_DATA_CON0_REG 0x23 397 #define RK801_DATA_CON1_REG 0x24 398 #define RK801_DATA_CON2_REG 0x25 399 #define RK801_DATA_CON3_REG 0x26 400 #define RK801_POWER_EXIT_SLP_SEQ0_REG 0x27 401 #define RK801_POWER_EXIT_SLP_SEQ1_REG 0x28 402 #define RK801_POWER_EXIT_SLP_SEQ2_REG 0x29 403 #define RK801_POWER_EXIT_SLP_SEQ3_REG 0x2a 404 #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ0_REG 0x2b 405 #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ1_REG 0x2c 406 #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ2_REG 0x2d 407 #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ3_REG 0x2e 408 #define RK801_BUCK_DEBUG1_REG 0x2f 409 #define RK801_BUCK_DEBUG2_REG 0x30 410 #define RK801_BUCK_DEBUG3_REG 0x31 411 #define RK801_BUCK_DEBUG4_REG 0x32 412 #define RK801_BUCK_DEBUG5_REG 0x33 413 #define RK801_BUCK_DEBUG7_REG 0x34 414 #define RK801_OTP_EN_CON_REG 0x35 415 #define RK801_TEST_CON_REG 0x36 416 #define RK801_EFUSE_CONTROL_REG 0x37 417 #define RK801_SYS_CFG3_OTP_REG 0x38 418 419 /* RK801 IRQ Definitions */ 420 #define RK801_IRQ_PWRON_FALL 0 421 #define RK801_IRQ_PWRON_RISE 1 422 #define RK801_IRQ_PWRON 2 423 #define RK801_IRQ_PWRON_LP 3 424 #define RK801_IRQ_HOTDIE 4 425 #define RK801_IRQ_VDC_RISE 5 426 #define RK801_IRQ_VDC_FALL 6 427 #define RK801_IRQ_PWRON_FALL_MSK BIT(0) 428 #define RK801_IRQ_PWRON_RISE_MSK BIT(1) 429 #define RK801_IRQ_PWRON_MSK BIT(2) 430 #define RK801_IRQ_PWRON_LP_MSK BIT(3) 431 #define RK801_IRQ_HOTDIE_MSK BIT(4) 432 #define RK801_IRQ_VDC_RISE_MSK BIT(5) 433 #define RK801_IRQ_VDC_FALL_MSK BIT(6) 434 /* RK801_SLP_LP_CONFIG_REG */ 435 #define RK801_BUCK_SLP_LP_EN BIT(3) 436 #define RK801_PLDO_SLP_LP_EN BIT(1) 437 #define RK801_SLP_LP_MASK (RK801_PLDO_SLP_LP_EN | RK801_BUCK_SLP_LP_EN) 438 /* RK801_SLEEP_CFG_REG */ 439 #define RK801_SLEEP_FUN_MSK 0x3 440 #define RK801_NONE_FUN 0x0 441 #define RK801_SLEEP_FUN 0x1 442 #define RK801_SHUTDOWN_FUN 0x2 443 #define RK801_RESET_FUN 0x3 444 /* RK801_SYS_CFG2_REG */ 445 #define RK801_SLEEP_POL_MSK BIT(1) 446 #define RK801_SLEEP_ACT_H BIT(1) 447 #define RK801_SLEEP_ACT_L 0 448 #define RK801_RST_MSK (0x3 << 4) 449 #define RK801_RST_RESTART_PMU (0x0 << 4) 450 #define RK801_RST_RESTART_REG (0x1 << 4) 451 #define RK801_RST_RESTART_REG_RESETB (0x2 << 4) 452 /* RK801_INT_CONFIG_REG */ 453 #define RK801_INT_POL_MSK BIT(1) 454 #define RK801_INT_ACT_H BIT(1) 455 #define RK801_INT_ACT_L 0 456 #define RK801_FPWM_MODE 1 457 #define RK801_AUTO_PWM_MODE 0 458 #define RK801_PLDO_HRDEC_EN BIT(6) 459 460 /* RK805 */ 461 enum rk805_reg { 462 RK805_ID_DCDC1, 463 RK805_ID_DCDC2, 464 RK805_ID_DCDC3, 465 RK805_ID_DCDC4, 466 RK805_ID_LDO1, 467 RK805_ID_LDO2, 468 RK805_ID_LDO3, 469 }; 470 471 /* CONFIG REGISTER */ 472 #define RK805_VB_MON_REG 0x21 473 #define RK805_THERMAL_REG 0x22 474 475 /* POWER CHANNELS ENABLE REGISTER */ 476 #define RK805_DCDC_EN_REG 0x23 477 #define RK805_SLP_DCDC_EN_REG 0x25 478 #define RK805_SLP_LDO_EN_REG 0x26 479 #define RK805_LDO_EN_REG 0x27 480 481 /* BUCK AND LDO CONFIG REGISTER */ 482 #define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2A 483 #define RK805_BUCK1_CONFIG_REG 0x2E 484 #define RK805_BUCK1_ON_VSEL_REG 0x2F 485 #define RK805_BUCK1_SLP_VSEL_REG 0x30 486 #define RK805_BUCK2_CONFIG_REG 0x32 487 #define RK805_BUCK2_ON_VSEL_REG 0x33 488 #define RK805_BUCK2_SLP_VSEL_REG 0x34 489 #define RK805_BUCK3_CONFIG_REG 0x36 490 #define RK805_BUCK4_CONFIG_REG 0x37 491 #define RK805_BUCK4_ON_VSEL_REG 0x38 492 #define RK805_BUCK4_SLP_VSEL_REG 0x39 493 #define RK805_LDO1_ON_VSEL_REG 0x3B 494 #define RK805_LDO1_SLP_VSEL_REG 0x3C 495 #define RK805_LDO2_ON_VSEL_REG 0x3D 496 #define RK805_LDO2_SLP_VSEL_REG 0x3E 497 #define RK805_LDO3_ON_VSEL_REG 0x3F 498 #define RK805_LDO3_SLP_VSEL_REG 0x40 499 500 /* INTERRUPT REGISTER */ 501 #define RK805_PWRON_LP_INT_TIME_REG 0x47 502 #define RK805_PWRON_DB_REG 0x48 503 #define RK805_DEV_CTRL_REG 0x4B 504 #define RK805_INT_STS_REG 0x4C 505 #define RK805_INT_STS_MSK_REG 0x4D 506 #define RK805_GPIO_IO_POL_REG 0x50 507 #define RK805_OUT_REG 0x52 508 #define RK805_ON_SOURCE_REG 0xAE 509 #define RK805_OFF_SOURCE_REG 0xAF 510 511 #define RK805_NUM_REGULATORS 7 512 513 #define RK805_PWRON_FALL_RISE_INT_EN 0x0 514 #define RK805_PWRON_FALL_RISE_INT_MSK 0x81 515 516 /* RK805 IRQ Definitions */ 517 #define RK805_IRQ_PWRON_RISE 0 518 #define RK805_IRQ_VB_LOW 1 519 #define RK805_IRQ_PWRON 2 520 #define RK805_IRQ_PWRON_LP 3 521 #define RK805_IRQ_HOTDIE 4 522 #define RK805_IRQ_RTC_ALARM 5 523 #define RK805_IRQ_RTC_PERIOD 6 524 #define RK805_IRQ_PWRON_FALL 7 525 526 #define RK805_IRQ_PWRON_RISE_MSK BIT(0) 527 #define RK805_IRQ_VB_LOW_MSK BIT(1) 528 #define RK805_IRQ_PWRON_MSK BIT(2) 529 #define RK805_IRQ_PWRON_LP_MSK BIT(3) 530 #define RK805_IRQ_HOTDIE_MSK BIT(4) 531 #define RK805_IRQ_RTC_ALARM_MSK BIT(5) 532 #define RK805_IRQ_RTC_PERIOD_MSK BIT(6) 533 #define RK805_IRQ_PWRON_FALL_MSK BIT(7) 534 535 #define RK805_PWR_RISE_INT_STATUS BIT(0) 536 #define RK805_VB_LOW_INT_STATUS BIT(1) 537 #define RK805_PWRON_INT_STATUS BIT(2) 538 #define RK805_PWRON_LP_INT_STATUS BIT(3) 539 #define RK805_HOTDIE_INT_STATUS BIT(4) 540 #define RK805_ALARM_INT_STATUS BIT(5) 541 #define RK805_PERIOD_INT_STATUS BIT(6) 542 #define RK805_PWR_FALL_INT_STATUS BIT(7) 543 544 #define RK805_BUCK1_2_ILMAX_MASK (3 << 6) 545 #define RK805_BUCK3_4_ILMAX_MASK (3 << 3) 546 #define RK805_RTC_PERIOD_INT_MASK (1 << 6) 547 #define RK805_RTC_ALARM_INT_MASK (1 << 5) 548 #define RK805_INT_ALARM_EN (1 << 3) 549 #define RK805_INT_TIMER_EN (1 << 2) 550 551 /* RK806 */ 552 #define RK806_POWER_EN0 0x0 553 #define RK806_POWER_EN1 0x1 554 #define RK806_POWER_EN2 0x2 555 #define RK806_POWER_EN3 0x3 556 #define RK806_POWER_EN4 0x4 557 #define RK806_POWER_EN5 0x5 558 #define RK806_POWER_SLP_EN0 0x6 559 #define RK806_POWER_SLP_EN1 0x7 560 #define RK806_POWER_SLP_EN2 0x8 561 #define RK806_POWER_DISCHRG_EN0 0x9 562 #define RK806_POWER_DISCHRG_EN1 0xA 563 #define RK806_POWER_DISCHRG_EN2 0xB 564 #define RK806_BUCK_FB_CONFIG 0xC 565 #define RK806_SLP_LP_CONFIG 0xD 566 #define RK806_POWER_FPWM_EN0 0xE 567 #define RK806_POWER_FPWM_EN1 0xF 568 #define RK806_BUCK1_CONFIG 0x10 569 #define RK806_BUCK2_CONFIG 0x11 570 #define RK806_BUCK3_CONFIG 0x12 571 #define RK806_BUCK4_CONFIG 0x13 572 #define RK806_BUCK5_CONFIG 0x14 573 #define RK806_BUCK6_CONFIG 0x15 574 #define RK806_BUCK7_CONFIG 0x16 575 #define RK806_BUCK8_CONFIG 0x17 576 #define RK806_BUCK9_CONFIG 0x18 577 #define RK806_BUCK10_CONFIG 0x19 578 #define RK806_BUCK1_ON_VSEL 0x1A 579 #define RK806_BUCK2_ON_VSEL 0x1B 580 #define RK806_BUCK3_ON_VSEL 0x1C 581 #define RK806_BUCK4_ON_VSEL 0x1D 582 #define RK806_BUCK5_ON_VSEL 0x1E 583 #define RK806_BUCK6_ON_VSEL 0x1F 584 #define RK806_BUCK7_ON_VSEL 0x20 585 #define RK806_BUCK8_ON_VSEL 0x21 586 #define RK806_BUCK9_ON_VSEL 0x22 587 #define RK806_BUCK10_ON_VSEL 0x23 588 #define RK806_BUCK1_SLP_VSEL 0x24 589 #define RK806_BUCK2_SLP_VSEL 0x25 590 #define RK806_BUCK3_SLP_VSEL 0x26 591 #define RK806_BUCK4_SLP_VSEL 0x27 592 #define RK806_BUCK5_SLP_VSEL 0x28 593 #define RK806_BUCK6_SLP_VSEL 0x29 594 #define RK806_BUCK7_SLP_VSEL 0x2A 595 #define RK806_BUCK8_SLP_VSEL 0x2B 596 #define RK806_BUCK9_SLP_VSEL 0x2D 597 #define RK806_BUCK10_SLP_VSEL 0x2E 598 #define RK806_BUCK_DEBUG1 0x30 599 #define RK806_BUCK_DEBUG2 0x31 600 #define RK806_BUCK_DEBUG3 0x32 601 #define RK806_BUCK_DEBUG4 0x33 602 #define RK806_BUCK_DEBUG5 0x34 603 #define RK806_BUCK_DEBUG6 0x35 604 #define RK806_BUCK_DEBUG7 0x36 605 #define RK806_BUCK_DEBUG8 0x37 606 #define RK806_BUCK_DEBUG9 0x38 607 #define RK806_BUCK_DEBUG10 0x39 608 #define RK806_BUCK_DEBUG11 0x3A 609 #define RK806_BUCK_DEBUG12 0x3B 610 #define RK806_BUCK_DEBUG13 0x3C 611 #define RK806_BUCK_DEBUG14 0x3D 612 #define RK806_BUCK_DEBUG15 0x3E 613 #define RK806_BUCK_DEBUG16 0x3F 614 #define RK806_BUCK_DEBUG17 0x40 615 #define RK806_BUCK_DEBUG18 0x41 616 #define RK806_NLDO_IMAX 0x42 617 #define RK806_NLDO1_ON_VSEL 0x43 618 #define RK806_NLDO2_ON_VSEL 0x44 619 #define RK806_NLDO3_ON_VSEL 0x45 620 #define RK806_NLDO4_ON_VSEL 0x46 621 #define RK806_NLDO5_ON_VSEL 0x47 622 #define RK806_NLDO1_SLP_VSEL 0x48 623 #define RK806_NLDO2_SLP_VSEL 0x49 624 #define RK806_NLDO3_SLP_VSEL 0x4A 625 #define RK806_NLDO4_SLP_VSEL 0x4B 626 #define RK806_NLDO5_SLP_VSEL 0x4C 627 #define RK806_PLDO_IMAX 0x4D 628 #define RK806_PLDO1_ON_VSEL 0x4E 629 #define RK806_PLDO2_ON_VSEL 0x4F 630 #define RK806_PLDO3_ON_VSEL 0x50 631 #define RK806_PLDO4_ON_VSEL 0x51 632 #define RK806_PLDO5_ON_VSEL 0x52 633 #define RK806_PLDO6_ON_VSEL 0x53 634 #define RK806_PLDO1_SLP_VSEL 0x54 635 #define RK806_PLDO2_SLP_VSEL 0x55 636 #define RK806_PLDO3_SLP_VSEL 0x56 637 #define RK806_PLDO4_SLP_VSEL 0x57 638 #define RK806_PLDO5_SLP_VSEL 0x58 639 #define RK806_PLDO6_SLP_VSEL 0x59 640 #define RK806_CHIP_NAME 0x5A 641 #define RK806_CHIP_VER 0x5B 642 #define RK806_OTP_VER 0x5C 643 #define RK806_SYS_STS 0x5D 644 #define RK806_SYS_CFG0 0x5E 645 #define RK806_SYS_CFG1 0x5F 646 #define RK806_SYS_OPTION 0x61 647 #define RK806_SLEEP_CONFIG0 0x62 648 #define RK806_SLEEP_CONFIG1 0x63 649 #define RK806_SLEEP_CTR_SEL0 0x64 650 #define RK806_SLEEP_CTR_SEL1 0x65 651 #define RK806_SLEEP_CTR_SEL2 0x66 652 #define RK806_SLEEP_CTR_SEL3 0x67 653 #define RK806_SLEEP_CTR_SEL4 0x68 654 #define RK806_SLEEP_CTR_SEL5 0x69 655 #define RK806_DVS_CTRL_SEL0 0x6A 656 #define RK806_DVS_CTRL_SEL1 0x6B 657 #define RK806_DVS_CTRL_SEL2 0x6C 658 #define RK806_DVS_CTRL_SEL3 0x6D 659 #define RK806_DVS_CTRL_SEL4 0x6E 660 #define RK806_DVS_CTRL_SEL5 0x6F 661 #define RK806_DVS_START_CTRL 0x70 662 #define RK806_SLEEP_GPIO 0x71 663 #define RK806_SYS_CFG3 0x72 664 #define RK806_ON_SOURCE 0x74 665 #define RK806_OFF_SOURCE 0x75 666 #define RK806_PWRON_KEY 0x76 667 #define RK806_INT_STS0 0x77 668 #define RK806_INT_MSK0 0x78 669 #define RK806_INT_STS1 0x79 670 #define RK806_INT_MSK1 0x7A 671 #define RK806_GPIO_INT_CONFIG 0x7B 672 #define RK806_DATA_REG0 0x7C 673 #define RK806_DATA_REG1 0x7D 674 #define RK806_DATA_REG2 0x7E 675 #define RK806_DATA_REG3 0x7F 676 #define RK806_DATA_REG4 0x80 677 #define RK806_DATA_REG5 0x81 678 #define RK806_DATA_REG6 0x82 679 #define RK806_DATA_REG7 0x83 680 #define RK806_DATA_REG8 0x84 681 #define RK806_DATA_REG9 0x85 682 #define RK806_DATA_REG10 0x86 683 #define RK806_DATA_REG11 0x87 684 #define RK806_DATA_REG12 0x88 685 #define RK806_DATA_REG13 0x89 686 #define RK806_DATA_REG14 0x8A 687 #define RK806_DATA_REG15 0x8B 688 #define RK806_TM_REG 0x8C 689 #define RK806_OTP_EN_REG 0x8D 690 #define RK806_FUNC_OTP_EN_REG 0x8E 691 #define RK806_TEST_REG1 0x8F 692 #define RK806_TEST_REG2 0x90 693 #define RK806_TEST_REG3 0x91 694 #define RK806_TEST_REG4 0x92 695 #define RK806_TEST_REG5 0x93 696 #define RK806_BUCK_VSEL_OTP_REG0 0x94 697 #define RK806_BUCK_VSEL_OTP_REG1 0x95 698 #define RK806_BUCK_VSEL_OTP_REG2 0x96 699 #define RK806_BUCK_VSEL_OTP_REG3 0x97 700 #define RK806_BUCK_VSEL_OTP_REG4 0x98 701 #define RK806_BUCK_VSEL_OTP_REG5 0x99 702 #define RK806_BUCK_VSEL_OTP_REG6 0x9A 703 #define RK806_BUCK_VSEL_OTP_REG7 0x9B 704 #define RK806_BUCK_VSEL_OTP_REG8 0x9C 705 #define RK806_BUCK_VSEL_OTP_REG9 0x9D 706 #define RK806_NLDO1_VSEL_OTP_REG0 0x9E 707 #define RK806_NLDO1_VSEL_OTP_REG1 0x9F 708 #define RK806_NLDO1_VSEL_OTP_REG2 0xA0 709 #define RK806_NLDO1_VSEL_OTP_REG3 0xA1 710 #define RK806_NLDO1_VSEL_OTP_REG4 0xA2 711 #define RK806_PLDO_VSEL_OTP_REG0 0xA3 712 #define RK806_PLDO_VSEL_OTP_REG1 0xA4 713 #define RK806_PLDO_VSEL_OTP_REG2 0xA5 714 #define RK806_PLDO_VSEL_OTP_REG3 0xA6 715 #define RK806_PLDO_VSEL_OTP_REG4 0xA7 716 #define RK806_PLDO_VSEL_OTP_REG5 0xA8 717 #define RK806_BUCK_EN_OTP_REG1 0xA9 718 #define RK806_NLDO_EN_OTP_REG1 0xAA 719 #define RK806_PLDO_EN_OTP_REG1 0xAB 720 #define RK806_BUCK_FB_RES_OTP_REG1 0xAC 721 #define RK806_OTP_RESEV_REG0 0xAD 722 #define RK806_OTP_RESEV_REG1 0xAE 723 #define RK806_OTP_RESEV_REG2 0xAF 724 #define RK806_OTP_RESEV_REG3 0xB0 725 #define RK806_OTP_RESEV_REG4 0xB1 726 #define RK806_BUCK_SEQ_REG0 0xB2 727 #define RK806_BUCK_SEQ_REG1 0xB3 728 #define RK806_BUCK_SEQ_REG2 0xB4 729 #define RK806_BUCK_SEQ_REG3 0xB5 730 #define RK806_BUCK_SEQ_REG4 0xB6 731 #define RK806_BUCK_SEQ_REG5 0xB7 732 #define RK806_BUCK_SEQ_REG6 0xB8 733 #define RK806_BUCK_SEQ_REG7 0xB9 734 #define RK806_BUCK_SEQ_REG8 0xBA 735 #define RK806_BUCK_SEQ_REG9 0xBB 736 #define RK806_BUCK_SEQ_REG10 0xBC 737 #define RK806_BUCK_SEQ_REG11 0xBD 738 #define RK806_BUCK_SEQ_REG12 0xBE 739 #define RK806_BUCK_SEQ_REG13 0xBF 740 #define RK806_BUCK_SEQ_REG14 0xC0 741 #define RK806_BUCK_SEQ_REG15 0xC1 742 #define RK806_BUCK_SEQ_REG16 0xC2 743 #define RK806_BUCK_SEQ_REG17 0xC3 744 #define RK806_HK_TRIM_REG1 0xC4 745 #define RK806_HK_TRIM_REG2 0xC5 746 #define RK806_BUCK_REF_TRIM_REG1 0xC6 747 #define RK806_BUCK_REF_TRIM_REG2 0xC7 748 #define RK806_BUCK_REF_TRIM_REG3 0xC8 749 #define RK806_BUCK_REF_TRIM_REG4 0xC9 750 #define RK806_BUCK_REF_TRIM_REG5 0xCA 751 #define RK806_BUCK_OSC_TRIM_REG1 0xCB 752 #define RK806_BUCK_OSC_TRIM_REG2 0xCC 753 #define RK806_BUCK_OSC_TRIM_REG3 0xCD 754 #define RK806_BUCK_OSC_TRIM_REG4 0xCE 755 #define RK806_BUCK_OSC_TRIM_REG5 0xCF 756 #define RK806_BUCK_TRIM_ZCDIOS_REG1 0xD0 757 #define RK806_BUCK_TRIM_ZCDIOS_REG2 0xD1 758 #define RK806_NLDO_TRIM_REG1 0xD2 759 #define RK806_NLDO_TRIM_REG2 0xD3 760 #define RK806_NLDO_TRIM_REG3 0xD4 761 #define RK806_PLDO_TRIM_REG1 0xD5 762 #define RK806_PLDO_TRIM_REG2 0xD6 763 #define RK806_PLDO_TRIM_REG3 0xD7 764 #define RK806_TRIM_ICOMP_REG1 0xD8 765 #define RK806_TRIM_ICOMP_REG2 0xD9 766 #define RK806_EFUSE_CONTROL_REGH 0xDA 767 #define RK806_FUSE_PROG_REG 0xDB 768 #define RK806_MAIN_FSM_STS_REG 0xDD 769 #define RK806_FSM_REG 0xDE 770 #define RK806_TOP_RESEV_OFFR 0xEC 771 #define RK806_TOP_RESEV_POR 0xED 772 #define RK806_BUCK_VRSN_REG1 0xEE 773 #define RK806_BUCK_VRSN_REG2 0xEF 774 #define RK806_NLDO_RLOAD_SEL_REG1 0xF0 775 #define RK806_PLDO_RLOAD_SEL_REG1 0xF1 776 #define RK806_PLDO_RLOAD_SEL_REG2 0xF2 777 #define RK806_BUCK_CMIN_MX_REG1 0xF3 778 #define RK806_BUCK_CMIN_MX_REG2 0xF4 779 #define RK806_BUCK_FREQ_SET_REG1 0xF5 780 #define RK806_BUCK_FREQ_SET_REG2 0xF6 781 #define RK806_BUCK_RS_MEABS_REG1 0xF7 782 #define RK806_BUCK_RS_MEABS_REG2 0xF8 783 #define RK806_BUCK_RS_ZDLEB_REG1 0xF9 784 #define RK806_BUCK_RS_ZDLEB_REG2 0xFA 785 #define RK806_BUCK_RSERVE_REG1 0xFB 786 #define RK806_BUCK_RSERVE_REG2 0xFC 787 #define RK806_BUCK_RSERVE_REG3 0xFD 788 #define RK806_BUCK_RSERVE_REG4 0xFE 789 #define RK806_BUCK_RSERVE_REG5 0xFF 790 791 /* INT_STS Register field definitions */ 792 #define RK806_INT_STS_PWRON_FALL BIT(0) 793 #define RK806_INT_STS_PWRON_RISE BIT(1) 794 #define RK806_INT_STS_PWRON BIT(2) 795 #define RK806_INT_STS_PWRON_LP BIT(3) 796 #define RK806_INT_STS_HOTDIE BIT(4) 797 #define RK806_INT_STS_VDC_RISE BIT(5) 798 #define RK806_INT_STS_VDC_FALL BIT(6) 799 #define RK806_INT_STS_VB_LO BIT(7) 800 #define RK806_INT_STS_REV0 BIT(0) 801 #define RK806_INT_STS_REV1 BIT(1) 802 #define RK806_INT_STS_REV2 BIT(2) 803 #define RK806_INT_STS_CRC_ERROR BIT(3) 804 #define RK806_INT_STS_SLP3_GPIO BIT(4) 805 #define RK806_INT_STS_SLP2_GPIO BIT(5) 806 #define RK806_INT_STS_SLP1_GPIO BIT(6) 807 #define RK806_INT_STS_WDT BIT(7) 808 809 /* SPI command */ 810 #define RK806_CMD_READ 0 811 #define RK806_CMD_WRITE BIT(7) 812 #define RK806_CMD_CRC_EN BIT(6) 813 #define RK806_CMD_CRC_DIS 0 814 #define RK806_CMD_LEN_MSK 0x0f 815 #define RK806_REG_H 0x00 816 817 #define VERSION_AB 0x01 818 819 enum rk806_reg_id { 820 RK806_ID_DCDC1 = 0, 821 RK806_ID_DCDC2, 822 RK806_ID_DCDC3, 823 RK806_ID_DCDC4, 824 RK806_ID_DCDC5, 825 RK806_ID_DCDC6, 826 RK806_ID_DCDC7, 827 RK806_ID_DCDC8, 828 RK806_ID_DCDC9, 829 RK806_ID_DCDC10, 830 831 RK806_ID_NLDO1, 832 RK806_ID_NLDO2, 833 RK806_ID_NLDO3, 834 RK806_ID_NLDO4, 835 RK806_ID_NLDO5, 836 837 RK806_ID_PLDO1, 838 RK806_ID_PLDO2, 839 RK806_ID_PLDO3, 840 RK806_ID_PLDO4, 841 RK806_ID_PLDO5, 842 RK806_ID_PLDO6, 843 RK806_ID_END, 844 }; 845 846 /* Define the RK806 IRQ numbers */ 847 enum rk806_irqs { 848 /* INT_STS0 registers */ 849 RK806_IRQ_PWRON_FALL, 850 RK806_IRQ_PWRON_RISE, 851 RK806_IRQ_PWRON, 852 RK806_IRQ_PWRON_LP, 853 RK806_IRQ_HOTDIE, 854 RK806_IRQ_VDC_RISE, 855 RK806_IRQ_VDC_FALL, 856 RK806_IRQ_VB_LO, 857 858 /* INT_STS0 registers */ 859 RK806_IRQ_REV0, 860 RK806_IRQ_REV1, 861 RK806_IRQ_REV2, 862 RK806_IRQ_CRC_ERROR, 863 RK806_IRQ_SLP3_GPIO, 864 RK806_IRQ_SLP2_GPIO, 865 RK806_IRQ_SLP1_GPIO, 866 RK806_IRQ_WDT, 867 }; 868 869 /* VCC1 Low Voltage Threshold */ 870 enum rk806_lv_sel { 871 VB_LO_SEL_2800, 872 VB_LO_SEL_2900, 873 VB_LO_SEL_3000, 874 VB_LO_SEL_3100, 875 VB_LO_SEL_3200, 876 VB_LO_SEL_3300, 877 VB_LO_SEL_3400, 878 VB_LO_SEL_3500, 879 }; 880 881 /* System Shutdown Voltage Select */ 882 enum rk806_uv_sel { 883 VB_UV_SEL_2700, 884 VB_UV_SEL_2800, 885 VB_UV_SEL_2900, 886 VB_UV_SEL_3000, 887 VB_UV_SEL_3100, 888 VB_UV_SEL_3200, 889 VB_UV_SEL_3300, 890 VB_UV_SEL_3400, 891 }; 892 893 /* Pin Function */ 894 enum rk806_pwrctrl_fun { 895 PWRCTRL_NULL_FUN, 896 PWRCTRL_SLP_FUN, 897 PWRCTRL_POWOFF_FUN, 898 PWRCTRL_RST_FUN, 899 PWRCTRL_DVS_FUN, 900 PWRCTRL_GPIO_FUN, 901 }; 902 903 /* Pin Polarity */ 904 enum rk806_pin_level { 905 POL_LOW, 906 POL_HIGH, 907 }; 908 909 enum rk806_vsel_ctr_sel { 910 CTR_BY_NO_EFFECT, 911 CTR_BY_PWRCTRL1, 912 CTR_BY_PWRCTRL2, 913 CTR_BY_PWRCTRL3, 914 }; 915 916 enum rk806_dvs_ctr_sel { 917 CTR_SEL_NO_EFFECT, 918 CTR_SEL_DVS_START1, 919 CTR_SEL_DVS_START2, 920 CTR_SEL_DVS_START3, 921 }; 922 923 enum rk806_pin_dr_sel { 924 RK806_PIN_INPUT, 925 RK806_PIN_OUTPUT, 926 }; 927 928 #define RK806_INT_POL_MSK BIT(1) 929 #define RK806_INT_POL_H BIT(1) 930 #define RK806_INT_POL_L 0 931 932 /* SYS_CFG3 */ 933 #define RK806_RST_FUN_MSK GENMASK(7, 6) 934 #define RK806_SLAVE_RESTART_FUN_MSK BIT(1) 935 #define RK806_SLAVE_RESTART_FUN_EN BIT(1) 936 #define RK806_SLAVE_RESTART_FUN_OFF 0 937 938 #define RK806_SYS_ENB2_2M_MSK BIT(1) 939 #define RK806_SYS_ENB2_2M_EN BIT(1) 940 #define RK806_SYS_ENB2_2M_OFF 0 941 942 enum rk806_int_fun { 943 RK806_INT_ONLY, 944 RK806_INT_ADN_WKUP, 945 }; 946 947 enum rk806_dvs_mode { 948 RK806_DVS_NOT_SUPPORT, 949 RK806_DVS_START1, 950 RK806_DVS_START2, 951 RK806_DVS_START3, 952 RK806_DVS_PWRCTRL1, 953 RK806_DVS_PWRCTRL2, 954 RK806_DVS_PWRCTRL3, 955 RK806_DVS_START_PWRCTR1, 956 RK806_DVS_START_PWRCTR2, 957 RK806_DVS_START_PWRCTR3, 958 RK806_DVS_END, 959 }; 960 961 /* RK808 IRQ Definitions */ 962 #define RK808_IRQ_VOUT_LO 0 963 #define RK808_IRQ_VB_LO 1 964 #define RK808_IRQ_PWRON 2 965 #define RK808_IRQ_PWRON_LP 3 966 #define RK808_IRQ_HOTDIE 4 967 #define RK808_IRQ_RTC_ALARM 5 968 #define RK808_IRQ_RTC_PERIOD 6 969 #define RK808_IRQ_PLUG_IN_INT 7 970 #define RK808_IRQ_PLUG_OUT_INT 8 971 #define RK808_NUM_IRQ 9 972 973 #define RK808_IRQ_VOUT_LO_MSK BIT(0) 974 #define RK808_IRQ_VB_LO_MSK BIT(1) 975 #define RK808_IRQ_PWRON_MSK BIT(2) 976 #define RK808_IRQ_PWRON_LP_MSK BIT(3) 977 #define RK808_IRQ_HOTDIE_MSK BIT(4) 978 #define RK808_IRQ_RTC_ALARM_MSK BIT(5) 979 #define RK808_IRQ_RTC_PERIOD_MSK BIT(6) 980 #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0) 981 #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1) 982 983 /* RK818 IRQ Definitions */ 984 #define RK818_IRQ_VOUT_LO 0 985 #define RK818_IRQ_VB_LO 1 986 #define RK818_IRQ_PWRON 2 987 #define RK818_IRQ_PWRON_LP 3 988 #define RK818_IRQ_HOTDIE 4 989 #define RK818_IRQ_RTC_ALARM 5 990 #define RK818_IRQ_RTC_PERIOD 6 991 #define RK818_IRQ_USB_OV 7 992 #define RK818_IRQ_PLUG_IN 8 993 #define RK818_IRQ_PLUG_OUT 9 994 #define RK818_IRQ_CHG_OK 10 995 #define RK818_IRQ_CHG_TE 11 996 #define RK818_IRQ_CHG_TS1 12 997 #define RK818_IRQ_TS2 13 998 #define RK818_IRQ_CHG_CVTLIM 14 999 #define RK818_IRQ_DISCHG_ILIM 15 1000 1001 #define RK818_IRQ_VOUT_LO_MSK BIT(0) 1002 #define RK818_IRQ_VB_LO_MSK BIT(1) 1003 #define RK818_IRQ_PWRON_MSK BIT(2) 1004 #define RK818_IRQ_PWRON_LP_MSK BIT(3) 1005 #define RK818_IRQ_HOTDIE_MSK BIT(4) 1006 #define RK818_IRQ_RTC_ALARM_MSK BIT(5) 1007 #define RK818_IRQ_RTC_PERIOD_MSK BIT(6) 1008 #define RK818_IRQ_USB_OV_MSK BIT(7) 1009 #define RK818_IRQ_PLUG_IN_MSK BIT(0) 1010 #define RK818_IRQ_PLUG_OUT_MSK BIT(1) 1011 #define RK818_IRQ_CHG_OK_MSK BIT(2) 1012 #define RK818_IRQ_CHG_TE_MSK BIT(3) 1013 #define RK818_IRQ_CHG_TS1_MSK BIT(4) 1014 #define RK818_IRQ_TS2_MSK BIT(5) 1015 #define RK818_IRQ_CHG_CVTLIM_MSK BIT(6) 1016 #define RK818_IRQ_DISCHG_ILIM_MSK BIT(7) 1017 1018 #define RK818_NUM_IRQ 16 1019 1020 #define RK808_VBAT_LOW_2V8 0x00 1021 #define RK808_VBAT_LOW_2V9 0x01 1022 #define RK808_VBAT_LOW_3V0 0x02 1023 #define RK808_VBAT_LOW_3V1 0x03 1024 #define RK808_VBAT_LOW_3V2 0x04 1025 #define RK808_VBAT_LOW_3V3 0x05 1026 #define RK808_VBAT_LOW_3V4 0x06 1027 #define RK808_VBAT_LOW_3V5 0x07 1028 #define VBAT_LOW_VOL_MASK (0x07 << 0) 1029 #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4) 1030 #define EN_VBAT_LOW_IRQ (0x1 << 4) 1031 #define VBAT_LOW_ACT_MASK (0x1 << 4) 1032 1033 #define BUCK_ILMIN_MASK (7 << 0) 1034 #define BOOST_ILMIN_MASK (7 << 0) 1035 #define BUCK1_RATE_MASK (3 << 3) 1036 #define BUCK2_RATE_MASK (3 << 3) 1037 #define MASK_ALL 0xff 1038 1039 #define BUCK_UV_ACT_MASK 0x0f 1040 #define BUCK_UV_ACT_DISABLE 0 1041 1042 #define SWITCH2_EN BIT(6) 1043 #define SWITCH1_EN BIT(5) 1044 #define DEV_OFF_RST BIT(3) 1045 #define DEV_RST BIT(2) 1046 #define DEV_OFF BIT(0) 1047 #define RTC_STOP BIT(0) 1048 1049 #define VB_LO_ACT BIT(4) 1050 #define VB_LO_SEL_3500MV (7 << 0) 1051 1052 #define VOUT_LO_INT BIT(0) 1053 #define CLK32KOUT2_EN BIT(0) 1054 1055 #define TEMP105C 0x08 1056 #define TEMP115C 0x0c 1057 #define TEMP_HOTDIE_MSK 0x0c 1058 #define SLP_SD_MSK (0x3 << 2) 1059 #define SHUTDOWN_FUN (0x2 << 2) 1060 #define SLEEP_FUN (0x1 << 2) 1061 #define RK8XX_ID_MSK 0xfff0 1062 #define PWM_MODE_MSK BIT(7) 1063 #define FPWM_MODE BIT(7) 1064 #define AUTO_PWM_MODE 0 1065 1066 enum rk817_reg_id { 1067 RK817_ID_DCDC1 = 0, 1068 RK817_ID_DCDC2, 1069 RK817_ID_DCDC3, 1070 RK817_ID_DCDC4, 1071 RK817_ID_LDO1, 1072 RK817_ID_LDO2, 1073 RK817_ID_LDO3, 1074 RK817_ID_LDO4, 1075 RK817_ID_LDO5, 1076 RK817_ID_LDO6, 1077 RK817_ID_LDO7, 1078 RK817_ID_LDO8, 1079 RK817_ID_LDO9, 1080 RK817_ID_BOOST, 1081 RK817_ID_BOOST_OTG_SW, 1082 RK817_NUM_REGULATORS 1083 }; 1084 1085 enum rk809_reg_id { 1086 RK809_ID_DCDC5 = RK817_ID_BOOST, 1087 RK809_ID_SW1, 1088 RK809_ID_SW2, 1089 RK809_NUM_REGULATORS 1090 }; 1091 1092 #define RK817_SECONDS_REG 0x00 1093 #define RK817_MINUTES_REG 0x01 1094 #define RK817_HOURS_REG 0x02 1095 #define RK817_DAYS_REG 0x03 1096 #define RK817_MONTHS_REG 0x04 1097 #define RK817_YEARS_REG 0x05 1098 #define RK817_WEEKS_REG 0x06 1099 #define RK817_ALARM_SECONDS_REG 0x07 1100 #define RK817_ALARM_MINUTES_REG 0x08 1101 #define RK817_ALARM_HOURS_REG 0x09 1102 #define RK817_ALARM_DAYS_REG 0x0a 1103 #define RK817_ALARM_MONTHS_REG 0x0b 1104 #define RK817_ALARM_YEARS_REG 0x0c 1105 #define RK817_RTC_CTRL_REG 0xd 1106 #define RK817_RTC_STATUS_REG 0xe 1107 #define RK817_RTC_INT_REG 0xf 1108 #define RK817_RTC_COMP_LSB_REG 0x10 1109 #define RK817_RTC_COMP_MSB_REG 0x11 1110 1111 /* RK817 Codec Registers */ 1112 #define RK817_CODEC_DTOP_VUCTL 0x12 1113 #define RK817_CODEC_DTOP_VUCTIME 0x13 1114 #define RK817_CODEC_DTOP_LPT_SRST 0x14 1115 #define RK817_CODEC_DTOP_DIGEN_CLKE 0x15 1116 #define RK817_CODEC_AREF_RTCFG0 0x16 1117 #define RK817_CODEC_AREF_RTCFG1 0x17 1118 #define RK817_CODEC_AADC_CFG0 0x18 1119 #define RK817_CODEC_AADC_CFG1 0x19 1120 #define RK817_CODEC_DADC_VOLL 0x1a 1121 #define RK817_CODEC_DADC_VOLR 0x1b 1122 #define RK817_CODEC_DADC_SR_ACL0 0x1e 1123 #define RK817_CODEC_DADC_ALC1 0x1f 1124 #define RK817_CODEC_DADC_ALC2 0x20 1125 #define RK817_CODEC_DADC_NG 0x21 1126 #define RK817_CODEC_DADC_HPF 0x22 1127 #define RK817_CODEC_DADC_RVOLL 0x23 1128 #define RK817_CODEC_DADC_RVOLR 0x24 1129 #define RK817_CODEC_AMIC_CFG0 0x27 1130 #define RK817_CODEC_AMIC_CFG1 0x28 1131 #define RK817_CODEC_DMIC_PGA_GAIN 0x29 1132 #define RK817_CODEC_DMIC_LMT1 0x2a 1133 #define RK817_CODEC_DMIC_LMT2 0x2b 1134 #define RK817_CODEC_DMIC_NG1 0x2c 1135 #define RK817_CODEC_DMIC_NG2 0x2d 1136 #define RK817_CODEC_ADAC_CFG0 0x2e 1137 #define RK817_CODEC_ADAC_CFG1 0x2f 1138 #define RK817_CODEC_DDAC_POPD_DACST 0x30 1139 #define RK817_CODEC_DDAC_VOLL 0x31 1140 #define RK817_CODEC_DDAC_VOLR 0x32 1141 #define RK817_CODEC_DDAC_SR_LMT0 0x35 1142 #define RK817_CODEC_DDAC_LMT1 0x36 1143 #define RK817_CODEC_DDAC_LMT2 0x37 1144 #define RK817_CODEC_DDAC_MUTE_MIXCTL 0x38 1145 #define RK817_CODEC_DDAC_RVOLL 0x39 1146 #define RK817_CODEC_DDAC_RVOLR 0x3a 1147 #define RK817_CODEC_AHP_ANTI0 0x3b 1148 #define RK817_CODEC_AHP_ANTI1 0x3c 1149 #define RK817_CODEC_AHP_CFG0 0x3d 1150 #define RK817_CODEC_AHP_CFG1 0x3e 1151 #define RK817_CODEC_AHP_CP 0x3f 1152 #define RK817_CODEC_ACLASSD_CFG1 0x40 1153 #define RK817_CODEC_ACLASSD_CFG2 0x41 1154 #define RK817_CODEC_APLL_CFG0 0x42 1155 #define RK817_CODEC_APLL_CFG1 0x43 1156 #define RK817_CODEC_APLL_CFG2 0x44 1157 #define RK817_CODEC_APLL_CFG3 0x45 1158 #define RK817_CODEC_APLL_CFG4 0x46 1159 #define RK817_CODEC_APLL_CFG5 0x47 1160 #define RK817_CODEC_DI2S_CKM 0x48 1161 #define RK817_CODEC_DI2S_RSD 0x49 1162 #define RK817_CODEC_DI2S_RXCR1 0x4a 1163 #define RK817_CODEC_DI2S_RXCR2 0x4b 1164 #define RK817_CODEC_DI2S_RXCMD_TSD 0x4c 1165 #define RK817_CODEC_DI2S_TXCR1 0x4d 1166 #define RK817_CODEC_DI2S_TXCR2 0x4e 1167 #define RK817_CODEC_DI2S_TXCR3_TXCMD 0x4f 1168 1169 /* RK817_CODEC_DI2S_CKM */ 1170 #define RK817_I2S_MODE_MASK (0x1 << 0) 1171 #define RK817_I2S_MODE_MST (0x1 << 0) 1172 #define RK817_I2S_MODE_SLV (0x0 << 0) 1173 1174 /* RK817_CODEC_DDAC_MUTE_MIXCTL */ 1175 #define DACMT_MASK (0x1 << 0) 1176 #define DACMT_ENABLE (0x1 << 0) 1177 #define DACMT_DISABLE (0x0 << 0) 1178 1179 /* RK817_CODEC_DI2S_RXCR2 */ 1180 #define VDW_RX_24BITS (0x17) 1181 #define VDW_RX_16BITS (0x0f) 1182 1183 /* RK817_CODEC_DI2S_TXCR2 */ 1184 #define VDW_TX_24BITS (0x17) 1185 #define VDW_TX_16BITS (0x0f) 1186 1187 /* RK817_CODEC_AMIC_CFG0 */ 1188 #define MIC_DIFF_MASK (0x1 << 7) 1189 #define MIC_DIFF_DIS (0x0 << 7) 1190 #define MIC_DIFF_EN (0x1 << 7) 1191 1192 /* RK817 Battery Registers */ 1193 #define RK817_GAS_GAUGE_ADC_CONFIG0 0x50 1194 #define RK817_GG_EN (0x1 << 7) 1195 #define RK817_SYS_VOL_ADC_EN (0x1 << 6) 1196 #define RK817_TS_ADC_EN (0x1 << 5) 1197 #define RK817_USB_VOL_ADC_EN (0x1 << 4) 1198 #define RK817_BAT_VOL_ADC_EN (0x1 << 3) 1199 #define RK817_BAT_CUR_ADC_EN (0x1 << 2) 1200 1201 #define RK817_GAS_GAUGE_ADC_CONFIG1 0x55 1202 1203 #define RK817_VOL_CUR_CALIB_UPD BIT(7) 1204 1205 #define RK817_GAS_GAUGE_GG_CON 0x56 1206 #define RK817_GAS_GAUGE_GG_STS 0x57 1207 1208 #define RK817_BAT_CON (0x1 << 4) 1209 #define RK817_RELAX_VOL_UPD (0x3 << 2) 1210 #define RK817_RELAX_STS (0x1 << 1) 1211 1212 #define RK817_GAS_GAUGE_RELAX_THRE_H 0x58 1213 #define RK817_GAS_GAUGE_RELAX_THRE_L 0x59 1214 #define RK817_GAS_GAUGE_OCV_THRE_VOL 0x62 1215 #define RK817_GAS_GAUGE_OCV_VOL_H 0x63 1216 #define RK817_GAS_GAUGE_OCV_VOL_L 0x64 1217 #define RK817_GAS_GAUGE_PWRON_VOL_H 0x6b 1218 #define RK817_GAS_GAUGE_PWRON_VOL_L 0x6c 1219 #define RK817_GAS_GAUGE_PWRON_CUR_H 0x6d 1220 #define RK817_GAS_GAUGE_PWRON_CUR_L 0x6e 1221 #define RK817_GAS_GAUGE_OFF_CNT 0x6f 1222 #define RK817_GAS_GAUGE_Q_INIT_H3 0x70 1223 #define RK817_GAS_GAUGE_Q_INIT_H2 0x71 1224 #define RK817_GAS_GAUGE_Q_INIT_L1 0x72 1225 #define RK817_GAS_GAUGE_Q_INIT_L0 0x73 1226 #define RK817_GAS_GAUGE_Q_PRES_H3 0x74 1227 #define RK817_GAS_GAUGE_Q_PRES_H2 0x75 1228 #define RK817_GAS_GAUGE_Q_PRES_L1 0x76 1229 #define RK817_GAS_GAUGE_Q_PRES_L0 0x77 1230 #define RK817_GAS_GAUGE_BAT_VOL_H 0x78 1231 #define RK817_GAS_GAUGE_BAT_VOL_L 0x79 1232 #define RK817_GAS_GAUGE_BAT_CUR_H 0x7a 1233 #define RK817_GAS_GAUGE_BAT_CUR_L 0x7b 1234 #define RK817_GAS_GAUGE_USB_VOL_H 0x7e 1235 #define RK817_GAS_GAUGE_USB_VOL_L 0x7f 1236 #define RK817_GAS_GAUGE_SYS_VOL_H 0x80 1237 #define RK817_GAS_GAUGE_SYS_VOL_L 0x81 1238 #define RK817_GAS_GAUGE_Q_MAX_H3 0x82 1239 #define RK817_GAS_GAUGE_Q_MAX_H2 0x83 1240 #define RK817_GAS_GAUGE_Q_MAX_L1 0x84 1241 #define RK817_GAS_GAUGE_Q_MAX_L0 0x85 1242 #define RK817_GAS_GAUGE_SLEEP_CON_SAMP_CUR_H 0x8f 1243 #define RK817_GAS_GAUGE_SLEEP_CON_SAMP_CUR_L 0x90 1244 #define RK817_GAS_GAUGE_CAL_OFFSET_H 0x91 1245 #define RK817_GAS_GAUGE_CAL_OFFSET_L 0x92 1246 #define RK817_GAS_GAUGE_VCALIB0_H 0x93 1247 #define RK817_GAS_GAUGE_VCALIB0_L 0x94 1248 #define RK817_GAS_GAUGE_VCALIB1_H 0x95 1249 #define RK817_GAS_GAUGE_VCALIB1_L 0x96 1250 #define RK817_GAS_GAUGE_IOFFSET_H 0x97 1251 #define RK817_GAS_GAUGE_IOFFSET_L 0x98 1252 #define RK817_GAS_GAUGE_BAT_R1 0x9a 1253 #define RK817_GAS_GAUGE_BAT_R2 0x9b 1254 #define RK817_GAS_GAUGE_BAT_R3 0x9c 1255 #define RK817_GAS_GAUGE_DATA0 0x9d 1256 #define RK817_GAS_GAUGE_DATA1 0x9e 1257 #define RK817_GAS_GAUGE_DATA2 0x9f 1258 #define RK817_GAS_GAUGE_DATA3 0xa0 1259 #define RK817_GAS_GAUGE_DATA4 0xa1 1260 #define RK817_GAS_GAUGE_DATA5 0xa2 1261 #define RK817_GAS_GAUGE_CUR_ADC_K0 0xb0 1262 1263 #define RK817_POWER_EN_REG(i) (0xb1 + (i)) 1264 #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i)) 1265 1266 #define RK817_POWER_CONFIG (0xb9) 1267 1268 #define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3) 1269 1270 #define RK817_BUCK1_ON_VSEL_REG 0xBB 1271 #define RK817_BUCK1_SLP_VSEL_REG 0xBC 1272 1273 #define RK817_BUCK2_CONFIG_REG 0xBD 1274 #define RK817_BUCK2_ON_VSEL_REG 0xBE 1275 #define RK817_BUCK2_SLP_VSEL_REG 0xBF 1276 1277 #define RK817_BUCK3_CONFIG_REG 0xC0 1278 #define RK817_BUCK3_ON_VSEL_REG 0xC1 1279 #define RK817_BUCK3_SLP_VSEL_REG 0xC2 1280 1281 #define RK817_BUCK4_CONFIG_REG 0xC3 1282 #define RK817_BUCK4_ON_VSEL_REG 0xC4 1283 #define RK817_BUCK4_SLP_VSEL_REG 0xC5 1284 1285 #define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2) 1286 #define RK817_BOOST_OTG_CFG (0xde) 1287 1288 #define RK817_PMIC_CHRG_OUT 0xe4 1289 #define RK817_CHRG_VOL_SEL (0x07 << 4) 1290 #define RK817_CHRG_CUR_SEL (0x07 << 0) 1291 1292 #define RK817_PMIC_CHRG_IN 0xe5 1293 #define RK817_USB_VLIM_EN (0x01 << 7) 1294 #define RK817_USB_VLIM_SEL (0x07 << 4) 1295 #define RK817_USB_ILIM_EN (0x01 << 3) 1296 #define RK817_USB_ILIM_SEL (0x07 << 0) 1297 #define RK817_PMIC_CHRG_TERM 0xe6 1298 #define RK817_CHRG_TERM_ANA_DIG (0x01 << 2) 1299 #define RK817_CHRG_TERM_ANA_SEL (0x03 << 0) 1300 #define RK817_CHRG_EN (0x01 << 6) 1301 1302 #define RK817_PMIC_CHRG_STS 0xeb 1303 #define RK817_BAT_EXS BIT(7) 1304 #define RK817_CHG_STS (0x07 << 4) 1305 1306 #define RK817_ID_MSB 0xed 1307 #define RK817_ID_LSB 0xee 1308 1309 #define RK817_SYS_STS 0xf0 1310 #define RK817_PLUG_IN_STS (0x1 << 6) 1311 1312 #define RK817_SYS_CFG(i) (0xf1 + (i)) 1313 1314 #define RK817_ON_SOURCE_REG 0xf5 1315 #define RK817_OFF_SOURCE_REG 0xf6 1316 1317 /* INTERRUPT REGISTER */ 1318 #define RK817_INT_STS_REG0 0xf8 1319 #define RK817_INT_STS_MSK_REG0 0xf9 1320 #define RK817_INT_STS_REG1 0xfa 1321 #define RK817_INT_STS_MSK_REG1 0xfb 1322 #define RK817_INT_STS_REG2 0xfc 1323 #define RK817_INT_STS_MSK_REG2 0xfd 1324 #define RK817_GPIO_INT_CFG 0xfe 1325 1326 /* IRQ Definitions */ 1327 #define RK817_IRQ_PWRON_FALL 0 1328 #define RK817_IRQ_PWRON_RISE 1 1329 #define RK817_IRQ_PWRON 2 1330 #define RK817_IRQ_PWMON_LP 3 1331 #define RK817_IRQ_HOTDIE 4 1332 #define RK817_IRQ_RTC_ALARM 5 1333 #define RK817_IRQ_RTC_PERIOD 6 1334 #define RK817_IRQ_VB_LO 7 1335 #define RK817_IRQ_PLUG_IN 8 1336 #define RK817_IRQ_PLUG_OUT 9 1337 #define RK817_IRQ_CHRG_TERM 10 1338 #define RK817_IRQ_CHRG_TIME 11 1339 #define RK817_IRQ_CHRG_TS 12 1340 #define RK817_IRQ_USB_OV 13 1341 #define RK817_IRQ_CHRG_IN_CLMP 14 1342 #define RK817_IRQ_BAT_DIS_ILIM 15 1343 #define RK817_IRQ_GATE_GPIO 16 1344 #define RK817_IRQ_TS_GPIO 17 1345 #define RK817_IRQ_CODEC_PD 18 1346 #define RK817_IRQ_CODEC_PO 19 1347 #define RK817_IRQ_CLASSD_MUTE_DONE 20 1348 #define RK817_IRQ_CLASSD_OCP 21 1349 #define RK817_IRQ_BAT_OVP 22 1350 #define RK817_IRQ_CHRG_BAT_HI 23 1351 #define RK817_IRQ_END (RK817_IRQ_CHRG_BAT_HI + 1) 1352 1353 /* 1354 * rtc_ctrl 0xd 1355 * same as 808, except bit4 1356 */ 1357 #define RK817_RTC_CTRL_RSV4 BIT(4) 1358 1359 /* power config 0xb9 */ 1360 #define RK817_BUCK3_FB_RES_MSK BIT(6) 1361 #define RK817_BUCK3_FB_RES_INTER BIT(6) 1362 #define RK817_BUCK3_FB_RES_EXT 0 1363 1364 /* buck config 0xba */ 1365 #define RK817_RAMP_RATE_OFFSET 6 1366 #define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET) 1367 #define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET) 1368 #define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET) 1369 #define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET) 1370 #define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET) 1371 1372 /* sys_cfg1 0xf2 */ 1373 #define RK817_HOTDIE_TEMP_MSK (0x3 << 4) 1374 #define RK817_HOTDIE_85 (0x0 << 4) 1375 #define RK817_HOTDIE_95 (0x1 << 4) 1376 #define RK817_HOTDIE_105 (0x2 << 4) 1377 #define RK817_HOTDIE_115 (0x3 << 4) 1378 1379 #define RK817_TSD_TEMP_MSK BIT(6) 1380 #define RK817_TSD_140 0 1381 #define RK817_TSD_160 BIT(6) 1382 1383 #define RK817_CLK32KOUT2_EN BIT(7) 1384 1385 /* sys_cfg3 0xf4 */ 1386 #define RK817_SLPPIN_FUNC_MSK (0x3 << 3) 1387 #define SLPPIN_NULL_FUN (0x0 << 3) 1388 #define SLPPIN_SLP_FUN (0x1 << 3) 1389 #define SLPPIN_DN_FUN (0x2 << 3) 1390 #define SLPPIN_RST_FUN (0x3 << 3) 1391 1392 #define RK817_RST_FUNC_MSK (0x3 << 6) 1393 #define RK817_RST_FUNC_SFT (6) 1394 #define RK817_RST_FUNC_CNT (3) 1395 #define RK817_RST_FUNC_DEV (0) /* reset the dev */ 1396 #define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */ 1397 1398 #define RK817_SLPPOL_MSK BIT(5) 1399 #define RK817_SLPPOL_H BIT(5) 1400 #define RK817_SLPPOL_L (0) 1401 1402 /* gpio&int 0xfe */ 1403 #define RK817_INT_POL_MSK BIT(1) 1404 #define RK817_INT_POL_H BIT(1) 1405 #define RK817_INT_POL_L 0 1406 #define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1) 1407 1408 enum { 1409 BUCK_ILMIN_50MA, 1410 BUCK_ILMIN_100MA, 1411 BUCK_ILMIN_150MA, 1412 BUCK_ILMIN_200MA, 1413 BUCK_ILMIN_250MA, 1414 BUCK_ILMIN_300MA, 1415 BUCK_ILMIN_350MA, 1416 BUCK_ILMIN_400MA, 1417 }; 1418 1419 enum { 1420 BOOST_ILMIN_75MA, 1421 BOOST_ILMIN_100MA, 1422 BOOST_ILMIN_125MA, 1423 BOOST_ILMIN_150MA, 1424 BOOST_ILMIN_175MA, 1425 BOOST_ILMIN_200MA, 1426 BOOST_ILMIN_225MA, 1427 BOOST_ILMIN_250MA, 1428 }; 1429 1430 enum { 1431 RK805_BUCK1_2_ILMAX_2500MA, 1432 RK805_BUCK1_2_ILMAX_3000MA, 1433 RK805_BUCK1_2_ILMAX_3500MA, 1434 RK805_BUCK1_2_ILMAX_4000MA, 1435 }; 1436 1437 enum { 1438 RK805_BUCK3_ILMAX_1500MA, 1439 RK805_BUCK3_ILMAX_2000MA, 1440 RK805_BUCK3_ILMAX_2500MA, 1441 RK805_BUCK3_ILMAX_3000MA, 1442 }; 1443 1444 enum { 1445 RK805_BUCK4_ILMAX_2000MA, 1446 RK805_BUCK4_ILMAX_2500MA, 1447 RK805_BUCK4_ILMAX_3000MA, 1448 RK805_BUCK4_ILMAX_3500MA, 1449 }; 1450 1451 enum { 1452 RK801_ID = 0x8010, 1453 RK805_ID = 0x8050, 1454 RK806_ID = 0x8060, 1455 RK808_ID = 0x0000, 1456 RK809_ID = 0x8090, 1457 RK816_ID = 0x8160, 1458 RK817_ID = 0x8170, 1459 RK818_ID = 0x8180, 1460 }; 1461 1462 struct rk808 { 1463 struct device *dev; 1464 struct regmap_irq_chip_data *irq_data; 1465 struct regmap *regmap; 1466 long variant; 1467 const struct regmap_config *regmap_cfg; 1468 const struct regmap_irq_chip *regmap_irq_chip; 1469 }; 1470 1471 void rk8xx_shutdown(struct device *dev); 1472 int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap *regmap); 1473 int rk8xx_suspend(struct device *dev); 1474 int rk8xx_resume(struct device *dev); 1475 1476 #endif /* __LINUX_REGULATOR_RK808_H */ 1477