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Searched refs:REG0 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/crypto/caam/
H A Dcaamalg_desc.c82 append_math_sub(desc, REG3, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_null_encap()
165 append_math_sub(desc, REG2, SEQOUTLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_null_decap()
349 append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_encap()
350 append_math_add(desc, VARSEQOUTLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_encap()
466 append_math_add(desc, VARSEQINLEN, SEQOUTLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_decap()
467 append_math_add(desc, VARSEQOUTLEN, SEQOUTLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_decap()
596 append_math_add(desc, VARSEQOUTLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_givencap()
603 append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_aead_givencap()
676 append_math_sub(desc, VARSEQOUTLEN, SEQINLEN, REG0, in cnstr_shdsc_gcm_encap()
710 append_math_sub(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_gcm_encap()
[all …]
H A Dcaamhash_desc.c68 append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_ahash()
123 append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); in cnstr_shdsc_sk_hash()
/linux/drivers/scsi/
H A Dqlogicfas408.c89 REG0; in ql_zap()
226 REG0; in ql_icmd()
239 REG0; in ql_icmd()
323 REG0; in ql_pcmd()
332 REG0; in ql_pcmd()
431 REG0; in ql_ihandl()
573 REG0; in qlogicfas408_setup()
586 REG0; in qlogicfas408_setup()
H A Dqlogicfas408.h91 #define REG0 ( outb( inb( qbase + 0xd ) & 0x7f , qbase + 0xd ), outb( 4 , qbase + 0xd )) macro
/linux/sound/sparc/
H A Ddbri.c240 #define REG0 0x00 /* Status and Control */ macro
646 while ((--maxloops) > 0 && (sbus_readl(dbri->regs + REG0) & D_P)) { in dbri_cmdwait()
724 tmp = sbus_readl(dbri->regs + REG0); in dbri_cmdsend()
726 sbus_writel(tmp, dbri->regs + REG0); in dbri_cmdsend()
739 sbus_readl(dbri->regs + REG0), in dbri_reset()
743 sbus_writel(D_R, dbri->regs + REG0); /* Soft Reset */ in dbri_reset()
744 for (i = 0; (sbus_readl(dbri->regs + REG0) & D_R) && i < 64; i++) in dbri_reset()
749 tmp = sbus_readl(dbri->regs + REG0); in dbri_reset()
752 sbus_writel(tmp, dbri->regs + REG0); in dbri_reset()
1442 tmp = sbus_readl(dbri->regs + REG0); in cs4215_open()
[all …]
/linux/drivers/scsi/pcmcia/
H A Dsym53c500_cs.c124 #define REG0(x) (outb(C4_IMG, (x) + CONFIG4)) macro
369 REG0(port_base); in SYM53C500_intr()
432 REG0(port_base); in SYM53C500_intr()
451 REG0(port_base); in SYM53C500_intr()
571 REG0(port_base); in SYM53C500_queue_lck()
/linux/drivers/scsi/aic7xxx/
H A Daic79xx.seq326 * Save SCBID of this SCB in REG0 since
332 bmov REG0, SCBPTR, 2;
348 bmov DINDIR, REG0, 2;
388 bmov MK_MESSAGE_SCB, REG0, 2;
396 bmov SCB_NEXT, REG0, 2 ret;
405 bmov SCB_NEXT2, REG0, 2;
406 bmov WAITING_TID_TAIL, REG0, 2 ret;
412 bmov WAITING_TID_HEAD, REG0, 2;
413 bmov WAITING_TID_TAIL, REG0, 2 ret;
757 bmov REG0, SCB_NEXT, 2;
[all …]
H A Daic79xx_reg.h_shipped1278 #define REG0 0xa0
H A Daic79xx_core.c2120 ahd_inw(ahd, REG0), ahd_inb(ahd, ACCUM)); in ahd_handle_seqint()
9863 ahd_name(ahd), ahd_inw(ahd, REG0), ahd_inw(ahd, SINDEX), in ahd_dump_card_state()
H A Daic79xx.reg3675 REG0 {
/linux/drivers/gpu/drm/xe/
H A Dxe_gt.c332 *cs++ = CS_ALU_INSTR_LOAD(SRCA, REG0); in emit_wa_job()
335 *cs++ = CS_ALU_INSTR_STORE(REG0, ACCU); in emit_wa_job()
336 *cs++ = CS_ALU_INSTR_LOAD(SRCA, REG0); in emit_wa_job()
339 *cs++ = CS_ALU_INSTR_STORE(REG0, ACCU); in emit_wa_job()
/linux/drivers/platform/arm64/
H A Dhuawei-gaokun-ec.c75 #define MKREQ(REG0, REG1, SIZE, ...) \ argument
77 REG0, REG1, SIZE, \
/linux/drivers/scsi/aic94xx/
H A Daic94xx_dump.c342 PRINT_MIS_word(asd_ha, REG0); in asd_dump_cseq_state()