Searched refs:REFCLK_CNTL (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.c | 85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
144 if (REG(REFCLK_CNTL)) in dccg2_init()
145 REG_WRITE(REFCLK_CNTL, 0); in dccg2_init()
153 if (REG(REFCLK_CNTL)) in dccg2_refclk_setup()
154 REG_WRITE(REFCLK_CNTL, 0); in dccg2_refclk_setup()
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| H A D | dcn20_dccg.h | 37 SR(REFCLK_CNTL),\
76 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
77 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh),\
392 uint32_t REFCLK_CNTL; \
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn301/ |
| H A D | dcn301_dccg.h | 37 SR(REFCLK_CNTL),\
56 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
57 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh)
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn303/ |
| H A D | dcn303_dccg.h | 36 SR(REFCLK_CNTL),\
49 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
50 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| H A D | dce_hwseq.h | 195 SR(REFCLK_CNTL), \
420 SR(REFCLK_CNTL), \
589 uint32_t REFCLK_CNTL; member
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