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Searched refs:READ_REG (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/net/ethernet/tehuti/
H A Dtehuti.c202 u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT; in bdx_link_changed()
258 isr = (READ_REG(priv, regISR) & IR_RUN); in bdx_isr_napi()
280 READ_REG(priv, regTXF_WPTR_0); in bdx_isr_napi()
281 READ_REG(priv, regRXD_WPTR_0); in bdx_isr_napi()
328 master = READ_REG(priv, regINIT_SEMAPHORE); in bdx_fw_load()
329 if (!READ_REG(priv, regINIT_STATUS) && master) { in bdx_fw_load()
337 if (READ_REG(priv, regINIT_STATUS)) { in bdx_fw_load()
354 READ_REG(priv, regVPC), in bdx_fw_load()
355 READ_REG(priv, regVIC), in bdx_fw_load()
356 READ_REG(priv, regINIT_STATUS), i); in bdx_fw_load()
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H A Dtehuti.h97 #define READ_REG(pp, reg) readl(pp->pBdxRegs + reg) macro
/linux/drivers/parisc/
H A Dsba_iommu.c139 #define READ_REG(addr) READ_REG64(addr) macro
142 #define READ_REG(addr) READ_REG32(addr) macro
845 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ in sba_unmap_phys()
853 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ in sba_unmap_phys()
1284 ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & ~0x1fffffULL; in sba_ioc_init_pluto()
1285 iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; in sba_ioc_init_pluto()
1581 ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL); in sba_hw_init()
1653 cfg_val = READ_REG(rope_cfg); in sba_hw_init()
1665 READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL); in sba_hw_init()
1669 (unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40), in sba_hw_init()
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H A Dlba_pci.c891 t = READ_REG##size(astro_iop_base + addr); \
974 t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
/linux/drivers/ata/
H A Dpata_opti.c39 READ_REG = 0, /* index of Read cycle timing register */ enumerator
143 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); in opti_set_piomode()
H A Dpata_optidma.c38 READ_REG = 0, /* index of Read cycle timing register */ enumerator
169 iowrite8(data_rec_timing[pci_clock][pio], regio + READ_REG); in optidma_mode_setup()
172 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + READ_REG); in optidma_mode_setup()
/linux/drivers/gpu/drm/amd/include/
H A Dmes_v11_api_def.h594 struct READ_REG { struct
673 struct READ_REG read_reg;
/linux/drivers/atm/
H A Diphase.h151 #define READ_REG 0x5 macro
H A Diphase.c2814 case READ_REG: