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Searched refs:RCS0 (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/ !
H A Dmmio_context.c62 {RCS0, RING_MODE_GEN7(RENDER_RING_BASE), 0xffff, false}, /* 0x229c */
63 {RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
64 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
65 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
66 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
67 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
68 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
69 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
70 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
71 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
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H A Dcmd_parser.c432 #define R_RCS BIT(RCS0)
604 [RCS0] = {
1058 if (IS_BROADWELL(s->engine->i915) && s->engine->id != RCS0) { in cmd_handler_lri()
1159 [RCS0] = {
H A Dhandlers.c346 engine_mask |= BIT(RCS0); in gdrst_mmio_write()
2110 id = RCS0; in gvt_reg_tlb_control_handler()
/linux/drivers/gpu/drm/i915/selftests/ !
H A Dmock_gem_device.c242 to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0); in mock_gem_device()
243 if (!to_gt(i915)->engine[RCS0]) in mock_gem_device()
246 if (mock_engine_init(to_gt(i915)->engine[RCS0])) in mock_gem_device()
H A Di915_request.c219 ce = i915_gem_context_get_engine(ctx[0], RCS0); in igt_request_rewind()
237 ce = i915_gem_context_get_engine(ctx[1], RCS0); in igt_request_rewind()
/linux/drivers/gpu/drm/i915/gt/ !
H A Dselftest_engine_cs.c151 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_bb_start()
279 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_noop()
H A Dintel_engine_cs.c64 [RCS0] = {
402 [RCS0] = GEN11_GRDOM_RENDER, in get_reset_domain()
435 [RCS0] = GEN6_GRDOM_RENDER, in get_reset_domain()
1701 [RCS0] = MSG_IDLE_CS, in __cs_pending_mi_force_wakes()
1784 if (engine->id != RCS0) in intel_engine_get_instdone()
1818 if (engine->id != RCS0) in intel_engine_get_instdone()
1830 if (engine->id == RCS0) in intel_engine_get_instdone()
H A Dselftest_gt_pm.c104 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in live_gt_clocks()
H A Dintel_engine_user.c167 [RENDER_CLASS] = { RCS0, 1 }, in legacy_ring_idx()
H A Dintel_engine_types.h112 RCS0 = 0, enumerator
H A Dintel_engine.h95 ENGINE_INSTANCES_MASK(gt, RCS0, I915_MAX_RCS)
H A Dintel_ring_submission.c95 case RCS0: in set_hwsp()
979 GEM_BUG_ON(engine->id != RCS0); in switch_context()
H A Dintel_mocs.c571 [RCS0] = __GEN9_RCS0_MOCS0, in mocs_offset()
H A Dgen8_engine_cs.c173 case RCS0: in gen12_get_aux_inv_reg()
H A Dintel_execlists_submission.c3499 [RCS0] = GEN8_RCS_IRQ_SHIFT, in logical_ring_default_irqs()
/linux/drivers/gpu/drm/i915/gem/ !
H A Di915_gem_execbuffer.c2213 if (GRAPHICS_VER(rq->i915) != 7 || rq->engine->id != RCS0) { in i915_reset_gen7_sol_offsets()
2460 [I915_EXEC_DEFAULT] = RCS0,
2461 [I915_EXEC_RENDER] = RCS0,
/linux/drivers/gpu/drm/i915/display/ !
H A Dintel_overlay.c1408 engine = to_gt(dev_priv)->engine[RCS0]; in intel_overlay_setup()
/linux/drivers/gpu/drm/i915/ !
H A Di915_gpu_error.c1364 case RCS0: in engine_record_registers()