1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3
4 #ifndef _FBNIC_FW_H_
5 #define _FBNIC_FW_H_
6
7 #include <linux/completion.h>
8 #include <linux/if_ether.h>
9 #include <linux/types.h>
10
11 struct fbnic_dev;
12 struct fbnic_tlv_msg;
13
14 struct fbnic_fw_mbx {
15 u8 ready, head, tail;
16 struct {
17 struct fbnic_tlv_msg *msg;
18 dma_addr_t addr;
19 } buf_info[FBNIC_IPC_MBX_DESC_LEN];
20 };
21
22 // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN
23 #define FBNIC_FW_VER_MAX_SIZE 32
24 // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT
25 #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE (FBNIC_FW_VER_MAX_SIZE - 13)
26 #define FBNIC_FW_LOG_VERSION 1
27 #define FBNIC_FW_LOG_MAX_SIZE 256
28 /*
29 * The max amount of logs which can fit in a single mailbox message. Firmware
30 * assumes each mailbox message is 4096B. The amount of messages supported is
31 * calculated as 4096 minus headers for message, arrays, and length minus the
32 * size of length divided by headers for each array plus the maximum LOG size,
33 * and the size of MSEC and INDEX. Put another way:
34 *
35 * MAX_LOG_HISTORY = ((4096 - TLV_HDR_SZ * 5 - LENGTH_SZ)
36 * / (FBNIC_FW_LOG_MAX_SIZE + TLV_HDR_SZ * 3 + MSEC_SZ
37 * + INDEX_SZ))
38 */
39 #define FBNIC_FW_MAX_LOG_HISTORY 14
40 #define FBNIC_MBX_RX_TO_SEC 10
41
42 struct fbnic_fw_ver {
43 u32 version;
44 char commit[FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE];
45 };
46
47 struct fbnic_fw_cap {
48 struct {
49 struct fbnic_fw_ver mgmt, bootloader;
50 } running;
51 struct {
52 struct fbnic_fw_ver mgmt, bootloader, undi;
53 } stored;
54 u8 active_slot;
55 u8 bmc_mac_addr[4][ETH_ALEN];
56 u8 bmc_present : 1;
57 u8 need_bmc_tcam_reinit : 1;
58 u8 need_bmc_macda_sync : 1;
59 u8 all_multi : 1;
60 u8 link_speed;
61 u8 link_fec;
62 u32 anti_rollback_version;
63 };
64
65 struct fbnic_fw_completion {
66 u32 msg_type;
67 struct completion done;
68 struct kref ref_count;
69 int result;
70 union {
71 struct {
72 u32 size;
73 } coredump_info;
74 struct {
75 u32 size;
76 u16 stride;
77 u8 *data[];
78 } coredump;
79 struct {
80 u32 offset;
81 u32 length;
82 } fw_update;
83 struct {
84 u16 length;
85 u8 offset;
86 u8 page;
87 u8 bank;
88 u8 data[] __aligned(sizeof(u32)) __counted_by(length);
89 } qsfp;
90 struct {
91 s32 millivolts;
92 s32 millidegrees;
93 } tsene;
94 } u;
95 };
96
97 u64 __fbnic_mbx_rd_desc(struct fbnic_dev *fbd, int mbx_idx, int desc_idx);
98 void fbnic_mbx_init(struct fbnic_dev *fbd);
99 void fbnic_mbx_clean(struct fbnic_dev *fbd);
100 int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd,
101 struct fbnic_fw_completion *cmpl_data);
102 void fbnic_mbx_clear_cmpl(struct fbnic_dev *fbd,
103 struct fbnic_fw_completion *cmpl_data);
104 void fbnic_mbx_poll(struct fbnic_dev *fbd);
105 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd);
106 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd);
107 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership);
108 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll);
109 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd);
110 int fbnic_fw_xmit_coredump_info_msg(struct fbnic_dev *fbd,
111 struct fbnic_fw_completion *cmpl_data,
112 bool force);
113 int fbnic_fw_xmit_coredump_read_msg(struct fbnic_dev *fbd,
114 struct fbnic_fw_completion *cmpl_data,
115 u32 offset, u32 length);
116 int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd,
117 struct fbnic_fw_completion *cmpl_data,
118 unsigned int id, unsigned int len);
119 int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd,
120 const u8 *data, u32 offset, u16 length,
121 int cancel_error);
122 int fbnic_fw_xmit_qsfp_read_msg(struct fbnic_dev *fbd,
123 struct fbnic_fw_completion *cmpl_data,
124 u32 page, u32 bank, u32 offset, u32 length);
125 int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,
126 struct fbnic_fw_completion *cmpl_data);
127 int fbnic_fw_xmit_send_logs(struct fbnic_dev *fbd, bool enable,
128 bool send_log_history);
129 int fbnic_fw_xmit_rpc_macda_sync(struct fbnic_dev *fbd);
130 struct fbnic_fw_completion *__fbnic_fw_alloc_cmpl(u32 msg_type,
131 size_t priv_size);
132 struct fbnic_fw_completion *fbnic_fw_alloc_cmpl(u32 msg_type);
133 void fbnic_fw_put_cmpl(struct fbnic_fw_completion *cmpl_data);
134
135 static inline unsigned long
fbnic_mbx_wait_for_cmpl(struct fbnic_fw_completion * cmpl)136 fbnic_mbx_wait_for_cmpl(struct fbnic_fw_completion *cmpl)
137 {
138 return wait_for_completion_timeout(&cmpl->done,
139 FBNIC_MBX_RX_TO_SEC * HZ);
140 }
141
142 #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \
143 do { \
144 const u32 __rev_id = _rev_id; \
145 snprintf(_str, _str_sz, "%02lu.%02lu.%02lu-%03lu%s%s", \
146 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MAJOR, __rev_id), \
147 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MINOR, __rev_id), \
148 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_PATCH, __rev_id), \
149 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_BUILD, __rev_id), \
150 _delim, _commit); \
151 } while (0)
152
153 #define fbnic_mk_fw_ver_str(_rev_id, _str) \
154 fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str))
155
156 enum {
157 QSPI_SECTION_CMRT = 0,
158 QSPI_SECTION_CONTROL_FW = 1,
159 QSPI_SECTION_UCODE = 2,
160 QSPI_SECTION_OPTION_ROM = 3,
161 QSPI_SECTION_USER = 4,
162 QSPI_SECTION_INVALID,
163 };
164
165 #define FW_HEARTBEAT_PERIOD (10 * HZ)
166
167 enum {
168 FBNIC_TLV_MSG_ID_HOST_CAP_REQ = 0x10,
169 FBNIC_TLV_MSG_ID_FW_CAP_RESP = 0x11,
170 FBNIC_TLV_MSG_ID_OWNERSHIP_REQ = 0x12,
171 FBNIC_TLV_MSG_ID_OWNERSHIP_RESP = 0x13,
172 FBNIC_TLV_MSG_ID_HEARTBEAT_REQ = 0x14,
173 FBNIC_TLV_MSG_ID_HEARTBEAT_RESP = 0x15,
174 FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_REQ = 0x18,
175 FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_RESP = 0x19,
176 FBNIC_TLV_MSG_ID_COREDUMP_READ_REQ = 0x20,
177 FBNIC_TLV_MSG_ID_COREDUMP_READ_RESP = 0x21,
178 FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ = 0x22,
179 FBNIC_TLV_MSG_ID_FW_START_UPGRADE_RESP = 0x23,
180 FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ = 0x24,
181 FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_RESP = 0x25,
182 FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_REQ = 0x28,
183 FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_RESP = 0x29,
184 FBNIC_TLV_MSG_ID_QSFP_READ_REQ = 0x38,
185 FBNIC_TLV_MSG_ID_QSFP_READ_RESP = 0x39,
186 FBNIC_TLV_MSG_ID_TSENE_READ_REQ = 0x3C,
187 FBNIC_TLV_MSG_ID_TSENE_READ_RESP = 0x3D,
188 FBNIC_TLV_MSG_ID_LOG_SEND_LOGS_REQ = 0x43,
189 FBNIC_TLV_MSG_ID_LOG_MSG_REQ = 0x44,
190 FBNIC_TLV_MSG_ID_LOG_MSG_RESP = 0x45,
191 FBNIC_TLV_MSG_ID_RPC_MAC_SYNC_REQ = 0x46,
192 };
193
194 #define FBNIC_FW_CAP_RESP_VERSION_MAJOR CSR_GENMASK(31, 24)
195 #define FBNIC_FW_CAP_RESP_VERSION_MINOR CSR_GENMASK(23, 16)
196 #define FBNIC_FW_CAP_RESP_VERSION_PATCH CSR_GENMASK(15, 8)
197 #define FBNIC_FW_CAP_RESP_VERSION_BUILD CSR_GENMASK(7, 0)
198 enum {
199 FBNIC_FW_CAP_RESP_VERSION = 0x0,
200 FBNIC_FW_CAP_RESP_BMC_PRESENT = 0x1,
201 FBNIC_FW_CAP_RESP_BMC_MAC_ADDR = 0x2,
202 FBNIC_FW_CAP_RESP_BMC_MAC_ARRAY = 0x3,
203 FBNIC_FW_CAP_RESP_STORED_VERSION = 0x4,
204 FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT = 0x5,
205 FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR = 0x6,
206 FBNIC_FW_CAP_RESP_BMC_ALL_MULTI = 0x8,
207 FBNIC_FW_CAP_RESP_FW_STATE = 0x9,
208 FBNIC_FW_CAP_RESP_FW_LINK_SPEED = 0xa,
209 FBNIC_FW_CAP_RESP_FW_LINK_FEC = 0xb,
210 FBNIC_FW_CAP_RESP_STORED_COMMIT_STR = 0xc,
211 FBNIC_FW_CAP_RESP_CMRT_VERSION = 0xd,
212 FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION = 0xe,
213 FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR = 0xf,
214 FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR = 0x10,
215 FBNIC_FW_CAP_RESP_UEFI_VERSION = 0x11,
216 FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR = 0x12,
217 FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION = 0x15,
218 FBNIC_FW_CAP_RESP_MSG_MAX
219 };
220
221 enum {
222 FBNIC_FW_LINK_MODE_25CR = 1,
223 FBNIC_FW_LINK_MODE_50CR2 = 2,
224 FBNIC_FW_LINK_MODE_50CR = 3,
225 FBNIC_FW_LINK_MODE_100CR2 = 4,
226 };
227
228 enum {
229 FBNIC_FW_LINK_FEC_NONE = 1,
230 FBNIC_FW_LINK_FEC_RS = 2,
231 FBNIC_FW_LINK_FEC_BASER = 3,
232 };
233
234 enum {
235 FBNIC_FW_QSFP_BANK = 0x0,
236 FBNIC_FW_QSFP_PAGE = 0x1,
237 FBNIC_FW_QSFP_OFFSET = 0x2,
238 FBNIC_FW_QSFP_LENGTH = 0x3,
239 FBNIC_FW_QSFP_ERROR = 0x4,
240 FBNIC_FW_QSFP_DATA = 0x5,
241 FBNIC_FW_QSFP_MSG_MAX
242 };
243
244 enum {
245 FBNIC_FW_TSENE_THERM = 0x0,
246 FBNIC_FW_TSENE_VOLT = 0x1,
247 FBNIC_FW_TSENE_ERROR = 0x2,
248 FBNIC_FW_TSENE_MSG_MAX
249 };
250
251 enum {
252 FBNIC_FW_OWNERSHIP_FLAG = 0x0,
253 FBNIC_FW_OWNERSHIP_TIME = 0x1,
254 FBNIC_FW_OWNERSHIP_MSG_MAX
255 };
256
257 enum {
258 FBNIC_FW_HEARTBEAT_UPTIME = 0x0,
259 FBNIC_FW_HEARTBEAT_NUMBER_OF_MESSAGES = 0x1,
260 FBNIC_FW_HEARTBEAT_MSG_MAX
261 };
262
263 enum {
264 FBNIC_FW_COREDUMP_REQ_INFO_CREATE = 0x0,
265 FBNIC_FW_COREDUMP_REQ_INFO_MSG_MAX
266 };
267
268 enum {
269 FBNIC_FW_COREDUMP_INFO_AVAILABLE = 0x0,
270 FBNIC_FW_COREDUMP_INFO_SIZE = 0x1,
271 FBNIC_FW_COREDUMP_INFO_ERROR = 0x2,
272 FBNIC_FW_COREDUMP_INFO_MSG_MAX
273 };
274
275 enum {
276 FBNIC_FW_COREDUMP_READ_OFFSET = 0x0,
277 FBNIC_FW_COREDUMP_READ_LENGTH = 0x1,
278 FBNIC_FW_COREDUMP_READ_DATA = 0x2,
279 FBNIC_FW_COREDUMP_READ_ERROR = 0x3,
280 FBNIC_FW_COREDUMP_READ_MSG_MAX
281 };
282
283 enum {
284 FBNIC_FW_START_UPGRADE_ERROR = 0x0,
285 FBNIC_FW_START_UPGRADE_SECTION = 0x1,
286 FBNIC_FW_START_UPGRADE_IMAGE_LENGTH = 0x2,
287 FBNIC_FW_START_UPGRADE_MSG_MAX
288 };
289
290 enum {
291 FBNIC_FW_WRITE_CHUNK_OFFSET = 0x0,
292 FBNIC_FW_WRITE_CHUNK_LENGTH = 0x1,
293 FBNIC_FW_WRITE_CHUNK_DATA = 0x2,
294 FBNIC_FW_WRITE_CHUNK_ERROR = 0x3,
295 FBNIC_FW_WRITE_CHUNK_MSG_MAX
296 };
297
298 enum {
299 FBNIC_FW_FINISH_UPGRADE_ERROR = 0x0,
300 FBNIC_FW_FINISH_UPGRADE_MSG_MAX
301 };
302
303 enum {
304 FBNIC_SEND_LOGS = 0x0,
305 FBNIC_SEND_LOGS_VERSION = 0x1,
306 FBNIC_SEND_LOGS_HISTORY = 0x2,
307 FBNIC_SEND_LOGS_MSG_MAX
308 };
309
310 enum {
311 FBNIC_FW_LOG_MSEC = 0x0,
312 FBNIC_FW_LOG_INDEX = 0x1,
313 FBNIC_FW_LOG_MSG = 0x2,
314 FBNIC_FW_LOG_LENGTH = 0x3,
315 FBNIC_FW_LOG_MSEC_ARRAY = 0x4,
316 FBNIC_FW_LOG_INDEX_ARRAY = 0x5,
317 FBNIC_FW_LOG_MSG_ARRAY = 0x6,
318 FBNIC_FW_LOG_MSG_MAX
319 };
320
321 enum {
322 FBNIC_FW_RPC_MAC_SYNC_RX_FLAGS = 0x0,
323 FBNIC_FW_RPC_MAC_SYNC_UC_ARRAY = 0x1,
324 FBNIC_FW_RPC_MAC_SYNC_MC_ARRAY = 0x2,
325 FBNIC_FW_RPC_MAC_SYNC_MAC_ADDR = 0x3,
326 FBNIC_FW_RPC_MAC_SYNC_MSG_MAX
327 };
328
329 #define FW_RPC_MAC_SYNC_RX_FLAGS_PROMISC 1
330 #define FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI 2
331 #define FW_RPC_MAC_SYNC_RX_FLAGS_BROADCAST 4
332
333 #define FW_RPC_MAC_SYNC_UC_ARRAY_SIZE 8
334 #define FW_RPC_MAC_SYNC_MC_ARRAY_SIZE 8
335
336 #endif /* _FBNIC_FW_H_ */
337