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Searched refs:PUSH_ASSERT (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Dpush006c.h51 PUSH_ASSERT(!((s) & ~DRF_MASK(NV06C_METHOD_SUBCHANNEL)), "subc"); \
52 PUSH_ASSERT(!((m) & ~DRF_SMASK(NV06C_METHOD_ADDRESS)), "mthd"); \
53 PUSH_ASSERT(!((c) & ~DRF_MASK(NV06C_METHOD_COUNT)), "count"); \
68 PUSH_ASSERT(!((o) & ~0x1fffffffcULL), "offset"); \
H A Dpush507c.h8 PUSH_ASSERT(!((m) & ~DRF_SMASK(NV507C_DMA_METHOD_OFFSET)), "mthd"); \
9 PUSH_ASSERT(!((c) & ~DRF_MASK(NV507C_DMA_METHOD_COUNT)), "size"); \
20 PUSH_ASSERT(!((o) & ~DRF_SMASK(NV507C_DMA_JUMP_OFFSET)), "offset"); \
H A Dpush906f.h24 PUSH_ASSERT(!((s) & ~DRF_MASK(NV906F_DMA_METHOD_SUBCHANNEL)), "subc"); \
25 PUSH_ASSERT(!((m) & ~(DRF_MASK(NV906F_DMA_METHOD_ADDRESS) << 2)), "mthd"); \
26 PUSH_ASSERT(!((c) & ~DRF_MASK(NV906F_DMA_METHOD_COUNT)), "count/immd"); \
H A Dpush.h85 #define PUSH_ASSERT(a,b) do { \ macro
95 PUSH_ASSERT(_p->cur < _p->seg, "segment overrun"); \
96 PUSH_ASSERT(_p->cur < _p->end, "pushbuf overrun"); \
129 PUSH_ASSERT(_p->cur + _s <= _p->seg, "segment overrun"); \
130 PUSH_ASSERT(_p->cur + _s <= _p->end, "pushbuf overrun"); \
141 PUSH_ASSERT((mB) - (mA) == (1?PUSH_##o##_INC), "mthd1"); \
146 PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd2"); \
151 PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd3"); \
156 PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd4"); \
161 PUSH_ASSERT((mB) - (mA) == (0?PUSH_##o##_INC), "mthd5"); \
[all …]
H A Dpushc97b.h8 PUSH_ASSERT(!((m) & ~DRF_SMASK(NVC97B_DMA_METHOD_OFFSET)), "mthd"); \
9 PUSH_ASSERT(!((c) & ~DRF_MASK(NVC97B_DMA_METHOD_COUNT)), "size"); \
H A Dpushc37b.h8 PUSH_ASSERT(!((m) & ~DRF_SMASK(NVC37B_DMA_METHOD_OFFSET)), "mthd"); \
9 PUSH_ASSERT(!((c) & ~DRF_MASK(NVC37B_DMA_METHOD_COUNT)), "size"); \
H A Dpush206e.h8 PUSH_ASSERT(!((o) & ~0xffffffffcULL), "offset"); \