Searched refs:PSR_MODE32_BIT (Results 1 – 13 of 13) sorted by relevance
357 mode = spsr & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_hyp_handle_eret()382 spsr = (spsr & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in kvm_hyp_handle_eret()549 u64 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in fixup_guest_exit()560 *vcpu_cpsr(vcpu) &= ~(PSR_MODE_MASK | PSR_MODE32_BIT); in fixup_guest_exit()
236 mode = regs->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK); in do_sdei_event()255 else if (mode & PSR_MODE32_BIT) in do_sdei_event()
2477 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) && in valid_compat_regs()2493 regs->pstate |= PSR_MODE32_BIT; in valid_compat_regs()2502 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) && in valid_native_regs()
367 tst x22, #PSR_MODE32_BIT // native task?
19 uc->uc_mcontext.pstate ^= PSR_MODE32_BIT; in mangle_invalid_pstate_run()
202 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \203 (PSR_MODE32_BIT | PSR_MODE_EL0t))
146 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); in vcpu_mode_is_32bit()182 switch (ctxt->regs.pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) { in vcpu_is_el2_ctxt()
293 u64 mode = ctxt->regs.pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in to_hw_pstate()304 return (ctxt->regs.pstate & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in to_hw_pstate()324 if (!(mode & PSR_MODE32_BIT) && mode >= PSR_MODE_EL2t) in __sysreg_restore_el2_return_state()
91 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in enter_exception64()97 else if (!(mode & PSR_MODE32_BIT)) in enter_exception64()
351 __entry->target_mode = spsr_el2 & (PSR_MODE_MASK | PSR_MODE32_BIT);381 __entry->source_mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
277 if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { in set_core_reg()
2670 (spsr & PSR_MODE32_BIT) || in kvm_check_illegal_exception_return()2683 PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_check_illegal_exception_return()2783 mode = pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_inject_nested()
42 #define PSR_MODE32_BIT 0x00000010 macro