Home
last modified time | relevance | path

Searched refs:PIPE_CONTROL_STATE_CACHE_INVALIDATE (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
H A Dgen6_engine_cs.c123 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; in gen6_emit_flush_rcs()
329 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; in gen7_emit_flush_rcs()
H A Dgen8_engine_cs.c36 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; in gen8_emit_flush_rcs()
150 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; in gen11_emit_flush_rcs()
326 flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; in gen12_emit_flush_rcs()
H A Dintel_gpu_commands.h316 #define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1<<2) macro
H A Dgen7_renderclear.c368 *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE; in gen7_emit_pipeline_invalidate()
/linux/drivers/gpu/drm/xe/
H A Dxe_ring_ops.c145 PIPE_CONTROL_STATE_CACHE_INVALIDATE | in emit_pipe_invalidate()