Searched refs:PIPE_CONFIG (Results 1 – 10 of 10) sorted by relevance
2359 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2363 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2367 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2371 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2375 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2378 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2382 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2386 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()2389 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16)); in cik_tiling_mode_table_init()2391 PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) | in cik_tiling_mode_table_init()[all …]
2498 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2507 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2516 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2525 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2534 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2543 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2552 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2561 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2570 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()2579 PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | in si_tiling_mode_table_init()[all …]
1185 # define PIPE_CONFIG(x) ((x) << 6) macro
1225 # define PIPE_CONFIG(x) ((x) << 6) macro
196 # define PIPE_CONFIG(x) ((x) << 6) macro
1832 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v8_0_crtc_do_set_base()
2021 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v6_0_crtc_do_set_base()
1885 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v10_0_crtc_do_set_base()
211 AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
1696 typedef enum PIPE_CONFIG { enum1712 } PIPE_CONFIG; typedef