| /linux/arch/xtensa/mm/ |
| H A D | cache.c | 96 set_bit(PG_arch_1, folio_flags(folio, 0)); in clear_user_highpage()
114 set_bit(PG_arch_1, folio_flags(folio, 0)); in copy_user_highpage()
137 if (!test_bit(PG_arch_1, &folio->flags.f)) in flush_dcache_folio()
138 set_bit(PG_arch_1, &folio->flags.f); in flush_dcache_folio()
235 if (!folio_test_reserved(folio) && test_bit(PG_arch_1, &folio->flags.f)) { in update_mmu_cache_range()
250 clear_bit(PG_arch_1, &folio->flags.f); in update_mmu_cache_range()
253 if (!folio_test_reserved(folio) && !test_bit(PG_arch_1, &folio->flags.f) in update_mmu_cache_range()
261 set_bit(PG_arch_1, &folio->flags.f); in update_mmu_cache_range()
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| /linux/arch/s390/kernel/ |
| H A D | uv.c | 147 clear_bit(PG_arch_1, &folio->flags.f); in uv_destroy_folio()
197 clear_bit(PG_arch_1, &folio->flags.f); in uv_convert_from_secure_folio()
260 set_bit(PG_arch_1, &folio->flags.f); in __make_folio_secure()
385 if (!test_bit(PG_arch_1, &folio->flags.f)) in arch_make_folio_accessible()
394 clear_bit(PG_arch_1, &folio->flags.f); in arch_make_folio_accessible()
400 clear_bit(PG_arch_1, &folio->flags.f); in arch_make_folio_accessible()
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| /linux/arch/arm64/include/asm/ |
| H A D | cacheflush.h | 18 #define PG_dcache_clean PG_arch_1
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| /linux/arch/csky/abiv1/ |
| H A D | cacheflush.c | 16 #define PG_dcache_clean PG_arch_1
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| /linux/arch/openrisc/include/asm/ |
| H A D | cacheflush.h | 74 #define PG_dc_clean PG_arch_1
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| /linux/arch/csky/abiv2/inc/abi/ |
| H A D | cacheflush.h | 19 #define PG_dcache_clean PG_arch_1
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| /linux/arch/arc/include/asm/ |
| H A D | cacheflush.h | 57 #define PG_dc_clean PG_arch_1
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| /linux/arch/riscv/include/asm/ |
| H A D | cacheflush.h | 22 #define PG_dcache_clean PG_arch_1
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| /linux/arch/nios2/include/asm/ |
| H A D | cacheflush.h | 19 #define PG_dcache_clean PG_arch_1
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| /linux/arch/powerpc/include/asm/ |
| H A D | cacheflush.h | 15 #define PG_dcache_clean PG_arch_1
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| /linux/arch/mips/include/asm/ |
| H A D | cacheflush.h | 37 #define PG_dcache_dirty PG_arch_1
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| /linux/arch/sh/include/asm/ |
| H A D | cacheflush.h | 103 #define PG_dcache_clean PG_arch_1
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| /linux/arch/x86/mm/pat/ |
| H A D | memtype.c | 122 #define _PGMT_WC (1UL << PG_arch_1)
124 #define _PGMT_WT (1UL << PG_arch_2 | 1UL << PG_arch_1)
125 #define _PGMT_MASK (1UL << PG_arch_2 | 1UL << PG_arch_1)
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| /linux/arch/arm/include/asm/ |
| H A D | cacheflush.h | 23 #define PG_dcache_clean PG_arch_1
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| /linux/fs/proc/ |
| H A D | page.c | 248 u |= kpf_copy_bit(k, KPF_ARCH, PG_arch_1); in stable_page_flags()
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| /linux/arch/xtensa/kernel/ |
| H A D | asm-offsets.c | 129 DEFINE(PG_ARCH_1, PG_arch_1); in main()
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| /linux/Documentation/translations/zh_CN/core-api/ |
| H A D | cachetlb.rst | 263 在folio->flags (PG_arch_1)中有一个位是“架构私有”。内核保证，
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| /linux/arch/s390/mm/ |
| H A D | fault.c | 446 clear_bit(PG_arch_1, &folio->flags.f); in do_secure_storage_access()
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| /linux/arch/parisc/include/asm/ |
| H A D | pgtable.h | 388 #define PG_dcache_dirty PG_arch_1 in set_ptes()
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| /linux/include/linux/ |
| H A D | page-flags.h | 69 * PG_arch_1 is an architecture specific page state bit. The generic code
106 PG_arch_1, enumerator
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| /linux/Documentation/core-api/ |
| H A D | cachetlb.rst | 309 There is a bit set aside in folio->flags (PG_arch_1) as "architecture
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| /linux/arch/sparc/mm/ |
| H A D | init_64.c | 218 #define PG_dcache_dirty PG_arch_1 in flush_dcache_folio_impl()
|